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Artificial Intelligence - RISC-V International
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RISC-V & AI
AI is transforming computing with RISC-V, optimizing hardware and software, and fostering innovation through a strong ecosystem of developers.
RISC-V is revolutionizing AI development by providing a flexible and open Instruction Set Architecture (ISA) that seamlessly integrates software and hardware.
As AI continues to reshape the computing landscape—from low-power MCU vision recognition to high-performance large language models (LLMs)—RISC-V enables optimized system design that enhances performance and efficiency.
This software-centric approach not only drives innovative computing capabilities but also strengthens the business case for bringing new AI solutions to market. With a thriving ecosystem of members dedicated to advancing technologies and expertise, RISC-V is your key to unlocking success in AI. Explore how RISC-V can elevate your AI initiatives.
Find out how RISC-V is enabling AI to address automotive use cases in our
latest whitepaper
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Video: Charting the Future of AI/ML with Open Standards and Global Collaboration
Philipp Tomsich, Technical Steering Committee Vice Chair, discusses RISC-V’s critical role in AI development, highlighting its flexibility for custom silicon design, strong ecosystem support, and emerging standards that enable efficient, domain-specific acceleration for AI applications, positioning RISC-V as the preferred architecture for building AI accelerators
Common Language for the Development of AI Systems
A New Standard For AI
RISC-V is quickly becoming the preferred
standard for building performant and effi
cient AI accelerators,
bringing together experts from different geographies and
industries to define the AI solutions of tomorrow.
A Common Language For AI
RISC-V provides a common language for AI development, as an industry standard ISA, backed by a cohesive ecosystem for AI/ML development addressing all market segments.
Ecosystem Support
A unified ecosystem unites global experts across industries to define tomorrow’s AI solutions, delivering innovative technologies for future generations.
Software-Based Approach to Hardware
Software Focused
The extensible industry standard RISC-V ISA enables a software-focused approach to
AI hardware,
and a unified programming model across AI workloads running
on CPU, GPU & NPU
Workload-Based Customization
RISC-V
’s modular architecture enables industry leading differentiation, through the
development of custom instructions and accelerators targeted at your software work
load
Future Proofed
The latest advancements in AI/ML algorithms can be quickly integrated into hard
ware designs, keeping pace with fast-evolving demands.
Control your Compute Roadmap & Supply Chain
Tailored Customization
RISC-V allows for domain-specific customization tailored to particular applications and workloads by enabling the selection of appropriate ratified extensions from the standard.
Extensibility
RISC-V enables the addition
of ratified extensions from the standard
vendor-
developed extensions to differentiate products with application-specific func
tionality.
Freedom to Innovate
A standardized yet flexible platform allows designers to rapidly integrate cutting-edge research into hardware without being hampered by proprietary constraints.
Building a Better Business Case for AI
Cost Efficient
RISC-V enables rapid innovation and cost-effective development.
No Lock-In
Free from restrictions of vendor lock-in RISC-V enables open collaboration and pooled resources to advance one interoperable global standard.
Flexibility
By reducing barriers to entry and democratizing AI,
RISC-V is
a standardized yet
flexible foundation
that upends the economics of custom silicon
enabling
industry-leading differentiation.
Hear from our Members About RISC-V and AI
Accelerating AI/ML SoCs with Andes RISC-V Solutions
Charlie Su, Andes Technology
RACE: Powering Next-Gen RISC-V AI Solutions
Shan Lui, Beijing Institute of Open-Source Chip (BOSC)
LLM Inference on RISC-V Embedded CPUs
Yueh-Feng Lee, Andes Technology
The Future of AI and Security
Andrew Dellow, Qualcomm; Kris Murphy, NVIDIA; Pete Bernard, tinyML Foundation; Pete Warden, Useful Sensors Inc; Andrea Gallo, RISC-V International
Lessons Learned in Using RISC-V for Generative AI and Where We Can Go from Here
Jayesh Iyer & Josep M Perez, Esperanto Technologies
Building Tool Chains for RISC-V AI Accelerators
Jeremy Bennett, Embecosm
The Benefits of Building New AI Accelerators with RISC-V
Cliff Young & Martin Maas, Google DeepMind
RISC-V at NVIDIA: One Architecture, Dozens of Applications, Billions of Processors
Frans Sijstermans, Vice President Multimedia Arch/ASIC, NVIDIA
All-in-One RISC-V AI Compute Engine
Roger Espasa, Semidynamics
Panel Discussion: Accelerating AI Innovation with RISC-V
Recent
AI
Stories on the RISC-V Blog
RISC-V International Staff
Jan 27, 2026
AI
Debug
Hardware
Tools
Verification
How We’re Using AI to Streamline RISC-V Regression Debugging
AI verification startup Verifaix explains how its AI Debug Agent automates regression debugging, helping RISC-V developers reduce manual verification effort and accelerate design cycles.
RISC-V International Staff
Dec 10, 2025
AI
Hardware
HPC
Ocelot3: Full Vector “V” Extension for BOOM
Project Snapshot Ocelot is an open-source project that enables vector support for the BOOM core. In this generation, we achieve full RVV 1.0 support. The decoupled VPU is connected through the Open Vector Interface, which…
RISC-V International Staff
Nov 26, 2025
AI
Edge
Security
ChannelLife: Edge AI, security & RISC-V to redefine IoT chips by 2026
Channel Life: The IoT semiconductor market is heading into a major shift by 2026, driven by the mainstream adoption of edge AI, the rise of open and modular architectures like RISC-V and chiplets, and increasing…
RISC-V International Staff
Nov 26, 2025
AI
Edge
Semiconductor Engineering: Why Openness Matters For AI At The Edge
Semiconductor Engineering: AI continues to migrate towards the edge and is no longer confined to the data center. Edge AI brings several key advantages, delivering intelligence closer to where data is generated, improving latency for…
RISC-V International Staff
Nov 25, 2025
AI
Developers
Software
Tools
Enabling High Performance RISC-V Software for AI in the Real World
Embecosm used the oneAPI Construction Kit to explore accelerating PyTorch using RISC-V cores, trying over a thousand in emulation and some on an FPGA. This case study shows how the oneAPI Construction Kit lets you…
RISC-V International Staff
Nov 17, 2025
AI
Andes: d-Matrix and Andes Team on World’s Highest Performing, Most Efficient Accelerator for AI Inference at Scale
Andes: d-Matrix and Andes have partnered to integrate Andes’ high-performance AX46MPV RISC-V CPU IP into d-Matrix’s next-generation Raptor accelerator, the first to feature 3D In-Memory Compute (3DIMC) technology for faster, more efficient AI inference at…
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