[PATCH 0/5 gnumach] smp: Parallel SMP init
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[PATCH 0/5 gnumach] smp: Parallel SMP init
From
Damien Zammit
Subject
[PATCH 0/5 gnumach] smp: Parallel SMP init
Date
Tue, 10 Dec 2024 07:29:34 +0000
Hi,
I figured out what was broken in my previous attempt at this:
The APs were calling splhigh() in the debug printing code,
which caused an unnecessary GS segment access.
This should now support all x86 cpus with any core counts.
Every 8 processors are grouped into the same IPI group,
so on occasion you will get more than the one processor interrupted
than the one you wanted, but this is the only way to do it
with APICs.
Mysteriously, this still fails on AMD fam15h.
I think the INIT/STARTUP sequence may need delay timings revised
for actual hardware, but it all works in qemu just fine
with no more hard smp boot hangs.
Damien
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[PATCH 0/5 gnumach] smp: Parallel SMP init
Damien Zammit
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[PATCH 1/5 gnumach] i386/apic: Fix logical id numbering
Damien Zammit
2024/12/10
Re: [PATCH 1/5 gnumach] i386/apic: Fix logical id numbering
Samuel Thibault
2024/12/10
[PATCH 2/5 gnumach] smp: Remove early GS access
Damien Zammit
2024/12/10
[PATCH 3/5 gnumach] smp: Delay setting spl_init flag until after smp bringup
Damien Zammit
2024/12/10
Re: [PATCH 3/5 gnumach] smp: Delay setting spl_init flag until after smp bringup
Samuel Thibault
2024/12/10
[PATCH 4/5 gnumach] smp: Make sure BSP is cpu 0 when starting other cpus
Damien Zammit
2024/12/10
Re: [PATCH 4/5 gnumach] smp: Make sure BSP is cpu 0 when starting other cpus
Samuel Thibault
2024/12/10
[PATCH 5/5 gnumach] smp: Parallel SMP init
Damien Zammit
2024/12/10
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