SPIR-V Specification
SPIR-V Specification
The Khronos
SPIR
Working Group
version 1.6,
Revision 7
Unified
Table of Contents
1. Introduction
1.1. Goals
1.2. Execution Environment and Client API
1.3. About This Document
1.3.1. Versioning
1.4. Extendability
1.5. Debuggability
1.6. Design Principles
1.7. Static Single Assignment (SSA)
1.8. Built-In Variables
1.9. Specialization
1.10. Example
2. Specification
2.1. Language Capabilities
2.2. Terms
2.2.1. Instructions
2.2.2. Types
2.2.3. Computation
2.2.4. Module
2.2.5. Control Flow
2.2.6. Validity and Defined Behavior
2.3. Physical Layout of a SPIR-V Module and Instruction
2.4. Logical Layout of a Module
2.5. Instructions
2.5.1. SSA Form
2.6. Entry Point and Execution Model
2.7. Execution Modes
2.8. Types and Variables
2.8.1. Unsigned Versus Signed Integers
2.9. Function Calling
2.10. Extended Instruction Sets
2.11. Structured Control Flow
2.11.1. Rules for Structured Control-flow Declarations
2.11.2. Structured Control-flow Constructs
2.11.3. Rules for Structured Control-flow Constructs
2.12. Specialization
2.13. Linkage
2.14. Relaxed Precision
2.15. Debug Information
2.15.1. Function-Name Mangling
2.16. Validation Rules
2.16.1. Universal Validation Rules
2.16.2. Validation Rules for Shader Capabilities
2.16.3. Validation Rules for Kernel Capabilities
2.17. Universal Limits
2.18. Memory Model
2.18.1. Memory Layout
2.18.2. Aliasing
2.18.3. Null pointers
2.19. Derivatives
2.20. Code Motion
2.21. Deprecation
2.22. Unified Specification
2.23. Uniformity
3. Binary Form
3.1. Magic Number
3.2. Enumerants
3.2.1. Source Language
3.2.2. Execution Model
3.2.3. Addressing Model
3.2.4. Memory Model
3.2.5. Execution Mode
3.2.6. Storage Class
3.2.7. Dim
3.2.8. Sampler Addressing Mode
3.2.9. Sampler Filter Mode
3.2.10. Image Format
3.2.11. Image Channel Order
3.2.12. Image Channel Data Type
3.2.13. Image Operands
3.2.14. FP Fast Math Mode
3.2.15. FP Rounding Mode
3.2.16. Linkage Type
3.2.17. Access Qualifier
3.2.18. Function Parameter Attribute
3.2.19. Decoration
3.2.20. BuiltIn
3.2.21. Selection Control
3.2.22. Loop Control
3.2.23. Function Control
3.2.24. Memory Semantics
3.2.25. Memory Operands
3.2.26. Scope
3.2.27. Group Operation
3.2.28. Kernel Enqueue Flags
3.2.29. Kernel Profiling Info
3.2.30. Capability
3.2.31. Ray Flags
3.2.32. Ray Query Intersection
3.2.33. Ray Query Committed Type
3.2.34. Ray Query Candidate Type
3.2.35. Fragment Shading Rate
3.2.36. FP Denorm Mode
3.2.37. FP Operation Mode
3.2.38. Quantization Mode
3.2.39. Overflow Mode
3.2.40. Packed Vector Format
3.2.41. Cooperative Matrix Operands
3.2.42. Cooperative Matrix Layout
3.2.43. Cooperative Matrix Use
3.2.44. Cooperative Matrix Reduce Mode
3.2.45. Tensor Clamp Mode
3.2.46. Tensor Addressing Operands
3.2.47. Tensor Operands
3.2.48. Initialization Mode Qualifier
3.2.49. Host Access Qualifier
3.2.50. Load Cache Control
3.2.51. Store Cache Control
3.2.52. Named Maximum Number of Registers
3.2.53. Matrix Multiply Accumulate Operands
3.2.54. Raw Access Chain Operands
3.2.55. FP Encoding
3.2.56. Cooperative Vector Matrix Layout
3.2.57. Cooperative Vector Matrix Component Type
3.3. Instructions
3.3.1. Miscellaneous Instructions
3.3.2. Debug Instructions
3.3.3. Annotation Instructions
3.3.4. Extension Instructions
3.3.5. Mode-Setting Instructions
3.3.6. Type-Declaration Instructions
3.3.7. Constant-Creation Instructions
3.3.8. Memory Instructions
3.3.9. Function Instructions
3.3.10. Image Instructions
3.3.11. Conversion Instructions
3.3.12. Composite Instructions
3.3.13. Arithmetic Instructions
3.3.14. Bit Instructions
3.3.15. Relational and Logical Instructions
3.3.16. Derivative Instructions
3.3.17. Control-Flow Instructions
3.3.18. Atomic Instructions
3.3.19. Primitive Instructions
3.3.20. Barrier Instructions
3.3.21. Group and Subgroup Instructions
3.3.22. Device-Side Enqueue Instructions
3.3.23. Pipe Instructions
3.3.24. Non-Uniform Instructions
3.3.25. Tensor Instructions
3.3.26. Graph Instructions
3.3.27. Reserved Instructions
4. Appendix A: Changes
4.1. Changes from Version 0.99, Revision 31
4.2. Changes from Version 0.99, Revision 32
4.3. Changes from Version 1.00, Revision 1
4.4. Changes from Version 1.00, Revision 2
4.5. Changes from Version 1.00, Revision 3
4.6. Changes from Version 1.00, Revision 4
4.7. Changes from Version 1.00, Revision 5
4.8. Changes from Version 1.00, Revision 6
4.9. Changes from Version 1.00, Revision 7
4.10. Changes from Version 1.00, Revision 8
4.11. Changes from Version 1.00, Revision 9
4.12. Changes from Version 1.00, Revision 10
4.13. Changes from Version 1.00, Revision 11
4.14. Changes from Version 1.00
4.15. Changes from Version 1.1, Revision 1
4.16. Changes from Version 1.1, Revision 2
4.17. Changes from Version 1.1, Revision 3
4.18. Changes from Version 1.1, Revision 4
4.19. Changes from Version 1.1, Revision 5
4.20. Changes from Version 1.1, Revision 6
4.21. Changes from Version 1.1, Revision 7
4.22. Changes from Version 1.1
4.23. Changes from Version 1.2, Revision 1
4.24. Changes from Version 1.2, Revision 2
4.25. Changes from Version 1.2, Revision 3
4.26. Changes from Version 1.2
4.27. Changes from Version 1.3, Revision 1
4.28. Changes from Version 1.3, Revision 2
4.29. Changes from Version 1.3, Revision 3
4.30. Changes from Version 1.3, Revision 4
4.31. Changes from Version 1.3, Revision 5
4.32. Changes from Version 1.3, Revision 6
4.33. Changes from Version 1.3, Revision 7
4.34. Changes from Version 1.3
4.35. Changes from Version 1.4, Revision 1
4.36. Changes from Version 1.4
4.37. Changes from Version 1.5, Revision 1
4.38. Changes from Version 1.5, Revision 2
4.39. Changes from Version 1.5, Revision 3
4.40. Changes from Version 1.5, Revision 4
4.41. Changes from Version 1.5, Revision 5
4.42. Changes from Version 1.5
4.43. Changes from Version 1.6, Revision 1
4.44. Changes from Version 1.6, Revision 2
4.45. Changes from Version 1.6, Revision 3
4.46. Changes from Version 1.6, Revision 4
4.47. Changes from Version 1.6, Revision 5
4.48. Changes from Version 1.6, Revision 6
Copyright 2014-2026 The Khronos Group Inc.
This Specification is protected by copyright laws and contains material
proprietary to Khronos. Except as described by these terms, it or any
components may not be reproduced, republished, distributed, transmitted,
displayed, broadcast or otherwise exploited in any manner without the
express prior written permission of Khronos.
Khronos grants a conditional copyright license to use and reproduce the
unmodified Specification for any purpose, without fee or royalty, EXCEPT no
licenses to any patent, trademark or other intellectual property rights are
granted under these terms.
Khronos makes no, and expressly disclaims any, representations or
warranties, express or implied, regarding this Specification, including,
without limitation: merchantability, fitness for a particular purpose,
non-infringement of any intellectual property, correctness, accuracy,
completeness, timeliness, and reliability. Under no circumstances will
Khronos, or any of its Promoters, Contributors or Members, or their
respective partners, officers, directors, employees, agents or
representatives be liable for any damages, whether direct, indirect, special
or consequential damages for lost revenues, lost profits, or otherwise,
arising from or in connection with these materials.
This Specification has been created under the Khronos Intellectual Property
Rights Policy, which is Attachment A of the Khronos Group Membership
Agreement available at
Parties desiring to implement the Specification and make use of Khronos
trademarks in relation to that implementation, and receive reciprocal patent
license protection under the Khronos Intellectual Property Rights Policy
must become Adopters and confirm the implementation as conformant under the
process defined by Khronos for this Specification; see
This Specification contains substantially unmodified functionality from, and
is a successor to, Khronos specifications including all versions of “The
SPIR Specification”, “The OpenGL Shading Language”, and “The OpenGL ES
Shading Language”, as well as all Khronos OpenCL API and OpenCL programming
language specifications.
The Khronos Intellectual Property Rights Policy defines the terms 'Scope',
'Compliant Portion', and 'Necessary Patent Claims'.
Some parts of this Specification are purely informative and so are EXCLUDED
the Scope of this Specification. Section 1.3 “About This Document” defines
how these parts of the Specification are identified.
Where this Specification uses technical terminology, defined in the Glossary
or otherwise, that refer to enabling technologies that are not expressly set
forth in this Specification, those enabling technologies are EXCLUDED from
the Scope of this Specification. For clarity, enabling technologies not
disclosed with particularity in this Specification (e.g. semiconductor
manufacturing technology, hardware architecture, processor architecture or
microarchitecture, memory architecture, compiler technology, object oriented
technology, basic operating system technology, compression technology,
algorithms, and so on) are NOT to be considered expressly set forth; only
those application program interfaces and data structures disclosed with
particularity are included in the Scope of this Specification.
For purposes of the Khronos Intellectual Property Rights Policy as it
relates to the definition of Necessary Patent Claims, all recommended or
optional features, behaviors and functionality set forth in this
Specification, if implemented, are considered to be included as Compliant
Portions.
Where this Specification identifies specific sections of external
references, only those specifically identified sections define normative
functionality. The Khronos Intellectual Property Rights Policy excludes
external references to materials and associated enabling technology not
created by Khronos from the Scope of this Specification, and any licenses
that may be required to implement such referenced materials and associated
technologies must be obtained separately and may involve royalty payments.
Khronos and Vulkan are registered trademarks, and SPIR, SPIR-V, and SYCL are
trademarks of The Khronos Group Inc. OpenCL is a trademark of Apple Inc.,
used under license by Khronos. OpenGL is a registered trademark and the
OpenGL ES logo is a trademark of Hewlett Packard Enterprise, used under
license by Khronos. All other product names, trademarks, and/or company
names are used solely for identification and belong to their respective
owners.
Contributors and Acknowledgments
Editors
John Kessenich, Google
Boaz Ouriel, Intel
Raun Krisch, Intel
Victor Lomüller, Codeplay
Diego Novillo, NVIDIA (current)
Contributors
Connor Abbott, Intel
Ben Ashbaugh, Intel
Alexey Bader, Intel
Alan Baker, Google
Dan Baker, Oxide Games
Kenneth Benzie, Codeplay
Jeff Bolz, NVIDIA
Stuart Brady, Arm
Gordon Brown, Codeplay
Pat Brown, NVIDIA
Nate Cesario, LunarG
Diana Po-Yu Chen, MediaTek
Stephen Clarke, Imagination
Joshua Davis, Unity
Hugo Devillers, University of Saarland
Patrick Doane, Blizzard Entertainment
Alastair Donaldson, Google
Yuehai Du, Qualcomm
Stefanus Du Toit, Google
Faith Ekstrand, Collabora
Gregory Fischer, LunarG
Theresa Foley, Intel
Spencer Fricke, Samsung
Ben Gaster, Qualcomm
Alexander Galazin, ARM
Christopher Gautier, ARM
Arcady Goldmints, LunarG
Jeremy Hayes, LunarG
Tobias Hector, AMD
Nicolai Hahnle, AMD
Neil Henning, AMD
Kerch Holt, NVIDIA
Lee Howes, Qualcomm
Samuel Huang, Mediatek
Marty Johnson, Khronos
Roy Ju, MediaTek
Baldur Karlsson, Valve
Ronan Keryell, Xilinx
John Kessenich, Google
Wooyoung Kim, Qualcomm
Vasileios Klimis, Imperial College London
Daniel Koch, NVIDIA
Ashwin Kolhe, NVIDIA
Tim Kong, Samsung
Raun Krisch, Intel
Graeme Leese, Broadcom
Yuan Lin, NVIDIA
Yaxun Liu, AMD
Victor Lomuller, Codeplay
Timothy Lottes, Epic Games
John McDonald, Valve
Mariusz Merecki, Intel
David Neto, Google
Boaz Ouriel, Intel
Kevin Petit, Arm
Robert Quill, Imagination Technologies
Christophe Riccio, Unity
Andrew Richards, Codeplay
Ian Romanick, Intel
Graham Sellers, AMD
Simon Waters, Samsung
Robert Simpson, Qualcomm
Pradyuman Singh, NVIDIA
Bartosz Sochacki, Intel
Nikos Stavropoulos, Think Silicon
Brian Sumner, AMD
John Wickerson, Imperial College London
Andrew Woloszyn, Google
Robin Voetter, StreamHPC
Ruihao Zhang, Qualcomm
Weifeng Zhang, Qualcomm
1. Introduction
Note
Up-to-date HTML and PDF versions of this specification may be found at the
Khronos SPIR-V Registry
. (
Abstract
SPIR-V is a simple binary intermediate language for graphical shaders and compute kernels.
A SPIR-V module contains multiple entry points with potentially shared functions in the entry point’s call trees.
Each function contains a control-flow graph (CFG) of basic blocks, with optional instructions to express structured control flow.
Load/store instructions are used to access declared variables, which includes all input/output (IO).
Intermediate results bypassing load/store use static single-assignment (SSA) representation.
Data objects are represented logically, with hierarchical type information: There is no flattening of aggregates or assignment to physical register banks, etc.
Selectable addressing models establish whether general pointer operations may be used, or if memory access is purely logical.
This document fully defines
SPIR-V
, a Khronos-standard binary intermediate language for representing graphical-shader
stages and compute kernels for multiple client APIs.
This is a
unified specification
, specifying all versions since and including version 1.0.
1.1. Goals
SPIR-V has the following goals:
Provide a simple binary intermediate language for all functionality appearing in Khronos shaders/kernels.
Have a concise, transparent, self-contained specification (sections
Specification
and
Binary Form
).
Map easily to other intermediate languages.
Be the form passed by a client API into a driver to set shaders/kernels.
Support multiple execution environments, specified by client APIs.
Can be targeted by new front ends for novel high-level languages.
Allow the first steps of compilation and reflection to be done offline.
Be low-level enough to require a reverse-engineering step to reconstruct source code.
Improve portability by enabling shared tools to generate or operate on it.
Reduce compile time during application run time. (Eliminating most of the compile time during application run time is not a goal of this intermediate language.
Target-specific register allocation and scheduling are still expected to take significant time.)
Allow some optimizations to be done offline.
1.2. Execution Environment and Client API
SPIR-V is adaptable to multiple execution environments:
A SPIR-V module is consumed by an execution environment, as specified by a client API.
The full set of rules needed to consume SPIR-V in a particular environment comes from
the combination of SPIR-V and that environment’s client API specification.
The client API specifies its SPIR-V execution environment as well as extra rules, limitations, capabilities, etc.
required by the form of SPIR-V it can validly consume.
1.3. About This Document
This document aims to:
Specify everything needed to create and consume non-extended SPIR-V, minus:
Extended instruction sets, which are imported and come with their own specifications.
Client API-specific rules, which are documented in client API specifications.
Separate expository and specification language.
The specification-proper is in
Specification
and
Binary Form
1.3.1. Versioning
The specification covers multiple versions of SPIR-V, as described in the
unified section
It has followed a
Major
Minor
Revision
versioning scheme,
with the specification’s stated version being the most recent version of SPIR-V.
Major
and
Minor
(but not
Revision
are declared within a SPIR-V module
Major
is reserved for future use and has been fixed at 1.
Minor
changes have signified additions, deprecation, and removal of features.
Revision
changes have included clarifications, bug fixes,
and
deprecation
(but not removal) of existing features.
1.4. Extendability
SPIR-V can be extended by multiple vendors or parties simultaneously:
Using the
OpExtension
instruction to add semantics,
which are described in an extension specification.
Reserving (registering) ranges of the token values, as described further below.
Aided by instruction skipping, also further described below.
Enumeration Token Values.
It is easy to extend all the types, storage classes, opcodes, decorations, etc. by adding to the token values.
Registration.
Ranges of token values in the
Binary Form
section can be pre-allocated to numerous vendors/parties.
This allows combining multiple independent extensions without conflict.
To register ranges, use the
repository,
and submit pull requests against the include/spirv/spir-v.xml file.
Extended Instructions.
Sets of extended instructions can be provided and specified in separate specifications.
Multiple sets of extended instructions can be imported without conflict, as the extended instructions are selected by {set id, instruction number} pairs.
Instruction Skipping.
Tools are encouraged to skip opcodes for features they are not required to process.
This is trivially enabled by the
word count
in an instruction, which makes it easier to add new instructions without breaking existing tools.
1.5. Debuggability
SPIR-V can decorate, with a text string, virtually anything created in the shader: types, variables, functions, etc.
This is required for externally visible symbols, and also allowed for naming the result of any instruction.
This can be used to aid in understandability when disassembling or debugging lowered versions of SPIR-V.
Location information (file names, lines, and columns) can be interleaved with the instruction stream to track the origin of each instruction.
1.6. Design Principles
Regularity.
All instructions start with a word count. This allows walking a SPIR-V module without decoding each opcode.
All instructions have an opcode that dictates for all operands what kind of operand they are. For instructions with a
variable number of operands, the number of variable operands is known by subtracting the number of non-variable words
from the instruction’s word count.
Non Combinatorial.
There is no combinatorial type explosion or need for large encode/decode tables for types.
Rather, types are parameterized. Image types declare their dimensionality, arrayness, etc. all orthogonally, which greatly simplify code.
This is done similarly for other types. It also applies to opcodes. Operations are orthogonal to scalar/vector size, but not
to integer vs. floating-point differences.
Modeless.
After a given execution model (e.g., pipeline stage) is specified, internal operation is essentially modeless:
Generally, it follows the rule: "same spelling, same semantics", and does not have mode bits that modify semantics.
If a change to SPIR-V modifies semantics, it should use a different spelling. This makes consumers of SPIR-V much more robust.
There are execution modes declared, but these generally affect the way the module interacts with its execution environment, not its internal semantics.
Capabilities are also declared, but this is to declare the subset of functionality that is used, not to change any semantics of what is used.
Declarative.
SPIR-V declares externally-visible modes like "writes depth", rather than having rules that require deduction from full shader inspection.
It also explicitly declares what addressing modes, execution model, extended instruction sets, etc. will be used.
See
Language Capabilities
for more information.
SSA.
All results of intermediate operations are strictly SSA.
However, declared variables reside in memory and use load/store for access, and such variables can be stored to multiple times.
IO.
Some storage classes are for input/output (IO) and, fundamentally,
IO is done through load/store of variables declared in these storage classes.
1.7. Static Single Assignment (SSA)
SPIR-V includes a phi instruction to allow the merging together of intermediate results from split control flow.
This allows split control flow without load/store to memory.
SPIR-V is flexible in the degree to which load/store is used; it is possible to use control flow with no phi-instructions,
while still staying in SSA form, by using memory load/store.
Some storage classes are for IO and, fundamentally, IO is done through load/store,
and initial load and final store won’t be eliminated.
Other storage classes are shader local and can have their load/store eliminated.
It can be considered an optimization to largely eliminate such loads/stores by moving them into intermediate results in SSA form.
1.8. Built-In Variables
SPIR-V identifies built-in variables from a high-level language with an enumerant decoration.
This assigns any unusual semantics to the variable.
Built-in variables are otherwise declared with their correct SPIR-V type and treated the same as any other variable.
1.9. Specialization
Specialization
enables offline creation of a portable SPIR-V module
based on constant values that won’t be known until a later point in time. For example, to size a
fixed array with a constant not known during creation of a module, but known when the module will be
lowered to the target architecture.
See
Specialization
in the next section for more details.
1.10. Example
The SPIR-V form is binary, not human readable, and fully described in
Binary Form
. This is an example disassembly to give a basic idea of what SPIR-V looks like:
GLSL fragment shader:
#version 450
in vec4 color1;
in vec4 multiplier;
noperspective in vec4 color2;
out vec4 color;
struct S {
bool b;
vec4 v[5];
int i;
};
uniform blockName {
S s;
bool cond;
};
void main()
vec4 scale = vec4(1.0, 1.0, 2.0, 1.0);
if (cond)
color = color1 + s.v[2];
else
color = sqrt(color2) * scale;
for (int i = 0; i < 4; ++i)
color *= multiplier;
Corresponding SPIR-V:
; Magic: 0x07230203 (SPIR-V)
; Version: 0x00010000 (Version: 1.0.0)
; Generator: 0x00080001 (Khronos Glslang Reference Front End; 1)
; Bound: 63
; Schema: 0
OpCapability Shader
%1 = OpExtInstImport "GLSL.std.450"
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %4 "main" %31 %33 %42 %57
OpExecutionMode %4 OriginLowerLeft
; Debug information
OpSource GLSL 450
OpName %4 "main"
OpName %9 "scale"
OpName %17 "S"
OpMemberName %17 0 "b"
OpMemberName %17 1 "v"
OpMemberName %17 2 "i"
OpName %18 "blockName"
OpMemberName %18 0 "s"
OpMemberName %18 1 "cond"
OpName %20 ""
OpName %31 "color"
OpName %33 "color1"
OpName %42 "color2"
OpName %48 "i"
OpName %57 "multiplier"
; Annotations (non-debug)
OpDecorate %15 ArrayStride 16
OpMemberDecorate %17 0 Offset 0
OpMemberDecorate %17 1 Offset 16
OpMemberDecorate %17 2 Offset 96
OpMemberDecorate %18 0 Offset 0
OpMemberDecorate %18 1 Offset 112
OpDecorate %18 Block
OpDecorate %20 DescriptorSet 0
OpDecorate %42 NoPerspective
; All types, variables, and constants
%2 = OpTypeVoid
%3 = OpTypeFunction %2 ; void ()
%6 = OpTypeFloat 32 ; 32-bit float
%7 = OpTypeVector %6 4 ; vec4
%8 = OpTypePointer Function %7 ; function-local vec4*
%10 = OpConstant %6 1
%11 = OpConstant %6 2
%12 = OpConstantComposite %7 %10 %10 %11 %10 ; vec4(1.0, 1.0, 2.0, 1.0)
%13 = OpTypeInt 32 0 ; 32-bit int, sign-less
%14 = OpConstant %13 5
%15 = OpTypeArray %7 %14
%16 = OpTypeInt 32 1
%17 = OpTypeStruct %13 %15 %16
%18 = OpTypeStruct %17 %13
%19 = OpTypePointer Uniform %18
%20 = OpVariable %19 Uniform
%21 = OpConstant %16 1
%22 = OpTypePointer Uniform %13
%25 = OpTypeBool
%26 = OpConstant %13 0
%30 = OpTypePointer Output %7
%31 = OpVariable %30 Output
%32 = OpTypePointer Input %7
%33 = OpVariable %32 Input
%35 = OpConstant %16 0
%36 = OpConstant %16 2
%37 = OpTypePointer Uniform %7
%42 = OpVariable %32 Input
%47 = OpTypePointer Function %16
%55 = OpConstant %16 4
%57 = OpVariable %32 Input
; All functions
%4 = OpFunction %2 None %3 ; main()
%5 = OpLabel
%9 = OpVariable %8 Function
%48 = OpVariable %47 Function
OpStore %9 %12
%23 = OpAccessChain %22 %20 %21 ; location of cond
%24 = OpLoad %13 %23 ; load 32-bit int from cond
%27 = OpINotEqual %25 %24 %26 ; convert to bool
OpSelectionMerge %29 None ; structured if
OpBranchConditional %27 %28 %41 ; if cond
%28 = OpLabel ; then
%34 = OpLoad %7 %33
%38 = OpAccessChain %37 %20 %35 %21 %36 ; s.v[2]
%39 = OpLoad %7 %38
%40 = OpFAdd %7 %34 %39
OpStore %31 %40
OpBranch %29
%41 = OpLabel ; else
%43 = OpLoad %7 %42
%44 = OpExtInst %7 %1 Sqrt %43 ; extended instruction sqrt
%45 = OpLoad %7 %9
%46 = OpFMul %7 %44 %45
OpStore %31 %46
OpBranch %29
%29 = OpLabel ; endif
OpStore %48 %35
OpBranch %49
%49 = OpLabel
OpLoopMerge %51 %52 None ; structured loop
OpBranch %53
%53 = OpLabel
%54 = OpLoad %16 %48
%56 = OpSLessThan %25 %54 %55 ; i < 4 ?
OpBranchConditional %56 %50 %51 ; body or break
%50 = OpLabel ; body
%58 = OpLoad %7 %57
%59 = OpLoad %7 %31
%60 = OpFMul %7 %59 %58
OpStore %31 %60
OpBranch %52
%52 = OpLabel ; continue target
%61 = OpLoad %16 %48
%62 = OpIAdd %16 %61 %21 ; ++i
OpStore %48 %62
OpBranch %49 ; loop back
%51 = OpLabel ; loop merge point
OpReturn
OpFunctionEnd
2. Specification
2.1. Language Capabilities
A SPIR-V module is consumed by a client API that needs to support the features used by that SPIR-V module.
Features are classified through
capabilities
Capabilities used by a particular SPIR-V module are declared early in that module with the
OpCapability
instruction. Then:
A validator can validate that the module uses only its declared capabilities.
A client API is allowed to reject modules declaring capabilities it does not support.
All available capabilities and their dependencies form a capability hierarchy, fully listed in the capability section.
Only top-level capabilities need to be explicitly declared; their dependencies are implicitly declared.
If an instruction, enumerant, or other feature specifies multiple enabling capabilities, only one such capability
needs to be declared to use the feature. This declaration does not itself imply anything about the presence of the
other enabling capabilities: The execution environment needs to support only the declared capability.
The SPIR-V specification provides universal capability-specific validation rules, in the
validation section
Additionally, each client API includes the following:
Which capabilities in the
capability
section it supports or requires, and hence allows in a SPIR-V module.
Any additional validation rules it has beyond those specified by the SPIR-V specification.
Required limits, if they are beyond the
Universal Limits
2.2. Terms
2.2.1. Instructions
Word
: 32 bits.
: A numerical name; the name used to refer to an object, a type, a function, a label, etc.
An
always consumes one
word
. The
defined by a module obey
SSA
Result
: Most instructions define a result, named by an
explicitly provided in the instruction.
The
Result
is used as an operand in other instructions to refer to the instruction that defined it.
Literal
: An immediate value, not an
Literals larger than one
word
consume multiple operands, one per word.
An instruction states what type the literal will be interpreted as.
A string is interpreted as a nul-terminated stream of characters.
All string comparisons are case sensitive.
The character set is Unicode in the UTF-8 encoding scheme.
The UTF-8 octets (8-bit bytes) are packed four per
word
following the little-endian convention (i.e., the first octet is in the lowest-order 8 bits of the word).
The final word contains the string’s nul-termination character (0),
and all contents past the end of the string in the final word are padded with 0.
For a numeric literal, the lower-order words appear first.
If a numeric type’s bit width is less than 32-bits, the value appears in the low-order bits of the word,
and the high-order bits must be 0 for a
floating-point type
or
integer type
with
Signedness
of 0,
or sign extended for an integer type with a
Signedness
of 1
(similarly for the remaining bits of widths larger than 32 bits but not a multiple of 32 bits).
Operand
: A one-
word
argument to an instruction.
E.g., it could be an
, or (or part of) a
literal
Which form it holds is always explicitly known from the opcode.
WordCount
: The complete number of
words
taken by an instruction, including the word holding the word count and opcode, and any optional operands.
An instruction’s word count is the total space taken by the instruction.
Instruction
: After a header, a module is simply a linear list of instructions. An instruction contains a
word count
, an opcode,
an optional
Result
, an optional
of the instruction’s type, and a variable list of operands.
All instruction opcodes and semantics are listed in
Instructions
Decoration
: Auxiliary information such as built-in variable, stream numbers, invariance, interpolation type, relaxed precision, etc.,
added to
or structure-type members through
Decorations
Decorations are enumerated in Decoration in the
Binary Form
section.
Object
: An instantiation of a non-void type, either as the
Result
of an operation, or created through
OpVariable
Memory Object
: An object created through
OpVariable
Such an object exists only for the duration of a function if it is a function variable,
and otherwise exists for the duration of an invocation.
Memory Object Declaration
: An
OpVariable
or an
OpFunctionParameter
of pointer type, or the contents of an
OpVariable
that holds either a pointer to the
PhysicalStorageBuffer
storage class
or an array of such pointers.
Intermediate Object
or
Intermediate Value
or
Intermediate Result
An object created by an operation (not memory allocated by
OpVariable
) and dying on its last consumption.
Constant Instruction
: Either a specialization-constant instruction
or a non-specialization constant instruction: Instructions that start "OpConstant" or "OpSpec".
[a, b]
: This square-bracket notation means the range from
to
, inclusive of
and
Parentheses exclude their end point, so, for example,
(a, b]
means
to
excluding
but including
Non-Semantic Instruction
: An instruction that has no semantic impact,
and that can be safely removed from the module.
Hint
: Either an indication to the compiler a property is likely to be observed or
a request to the compiler to perform a specific transformation. They do not affect the semantics of the program.
Unless stated otherwise, the compiler must not assume the property will be observed
or the transformation is always safe to be performed.
2.2.2. Types
Boolean type
: The type declared by
OpTypeBool
Integer type
: Any width signed or unsigned type from
OpTypeInt
By convention, the lowest-order bit is referred to as bit-number 0, and the highest-order bit as bit-number
Width
- 1.
Floating-point type
: Any width and encoding type from
OpTypeFloat
Numerical type
: An
integer
type or a
floating-point
type.
Scalar
: A single instance of a
numerical type
or
Boolean type
Scalars are also called
components
when being discussed either by themselves or in the context of the contents of a
vector
Vector
: An ordered homogeneous collection of two or more
scalars
Vector sizes are quite restrictive and dependent on the execution model.
Matrix
: An ordered homogeneous collection of vectors.
The vectors forming a matrix are also called its
columns
Matrix sizes are quite restrictive and dependent on the execution model.
Array
: An ordered homogeneous aggregate of any non-void-type objects.
The objects forming an array are also called its
elements
Array sizes are generally not restricted.
Structure
: An ordered heterogeneous aggregate of any non-void types.
The objects forming a structure are also called its
members
Aggregate
: A
structure
or an
array
Composite
: An
aggregate
, a
matrix
, or a
vector
Texel
: A single scalar or vector element of the data collection described
by an
image
. Each texel is stored in a particular
format
If the
Sampled Type
operand of the
image type
is not
OpTypeVoid
the value is converted according to the
Sampled Type
operand when the texel is read or written.
Image
: An opaque descriptor of an ordered, homogeneous,
multi-dimensional collection of formatted data elements called texels.
Image objects themselves are opaque and cannot be accessed or modified;
an image’s texels are accessed through dedicated
Image instructions
An image type is declared with
OpTypeImage
An image does not include any information about how to access, filter, or sample it.
Sampler
: Settings that describe how to access, filter, or sample an
image
Comes either from literal declarations of settings or from an opaque reference to externally bound settings.
A sampler does not include an
image
Sampled Image
: An
image
combined with a
sampler
, enabling filtered accesses of the image’s contents.
Physical Pointer Type
: An
OpTypePointer
whose
Storage Class
uses
physical addressing according to the
addressing model
Logical Pointer Type
: A pointer type that is not a
physical pointer type
Concrete Type
: A
numerical
scalar, vector, or matrix type,
or
physical pointer type
, or any aggregate containing only these types.
Abstract Type
: An
OpTypeVoid
or
OpTypeBool
or
logical pointer type
, or any aggregate type containing any of these.
Opaque Type
: A type that is, or contains, or points to, or contains pointers to, any of the following types:
OpTypeImage
OpTypeSampler
OpTypeSampledImage
OpTypeOpaque
OpTypeEvent
OpTypeDeviceEvent
OpTypeReserveId
OpTypeQueue
OpTypePipe
OpTypeForwardPointer
OpTypePipeStorage
OpTypeNamedBarrier
Variable pointer
: A pointer of logical pointer type that results from
one of the following instructions:
OpSelect
OpPhi
OpFunctionCall
OpPtrAccessChain
OpLoad
OpConstantNull
Additionally, any
OpAccessChain
OpInBoundsAccessChain
or
OpCopyObject
that takes a variable pointer as an operand also produces a variable pointer.
An
OpFunctionParameter
of pointer type is a variable pointer if any
OpFunctionCall
to the function statically passes a variable pointer as the value of the parameter.
Explicit Layout
: Types with an explicit layout have
decorations defining the relative locations of all of their constituents.
A type has an explicit layout if the following statements are true,
recursively applied to any nested types:
Each structure-type member must have an
Offset
decoration.
Each array type must have an
ArrayStride
decoration, unless it is an
array that contains a structure decorated with
Block
or
BufferBlock
in which case it must not have an
ArrayStride
decoration.
Each structure-type member that is a matrix or array-of-matrices must be
decorated with a
MatrixStride
decoration, and one of the
RowMajor
or
ColMajor
decorations.
ArrayStride
MatrixStride
, and
Offset
decorations must not cause overlap between elements or with other members.
Each
ArrayStride
and
MatrixStride
must be greater than zero.
A pointer to a structure decorated with
Block
or
BufferBlock
must not have an
ArrayStride
decoration
All members of a given structure must have distinct
Offset
decorations.
2.2.3. Computation
Remainder
: When dividing
by
, a
remainder
is defined to be a value that satisfies
where
is an integer and |
| < |
|.
2.2.4. Module
Module
: A single unit of SPIR-V. It can contain multiple
entry points
, but only one set of
capabilities
Entry Point
: A function in a
module
where execution begins.
A single
entry point
is limited to a single
execution model
An entry point is declared using
OpEntryPoint
Execution Model
: A graphical-pipeline stage or OpenCL kernel.
These are enumerated in
Execution Model
Execution Mode
: Modes of operation relating to the interface or execution environment of the module.
These are enumerated in
Execution Mode
. Generally, modes do not change the semantics
of instructions within a SPIR-V module.
Vertex Processor
: Any stage or execution model that processes vertices: Vertex, tessellation control, tessellation evaluation, and geometry.
Explicitly excludes fragment and compute execution models.
2.2.5. Control Flow
Block
: A contiguous sequence of instructions starting with an
OpLabel
, ending with a
block termination instruction
block
has no additional label or block termination instructions.
Function Termination Instruction
: One of the following, used to terminate execution of a function:
OpReturn
OpReturnValue
OpKill
OpUnreachable
OpTerminateInvocation
Conditional Branch Instruction
: One of the following, used as a
block termination instruction
OpBranchConditional
OpSwitch
Branch Instruction
: an
OpBranch
or a
conditional branch instruction
, used as a
block termination instruction
Block Termination Instruction
: One of the following, used to terminate blocks:
any
branch instruction
any
function termination instruction
Control-Flow Graph
: The graph formed by a function’s blocks and branches. The blocks are the graph’s nodes, and the branches the graph’s edges.
CFG
: Control-flow graph.
Merge Instruction
: One of the following, used before a branch instruction to declare structured control flow:
OpSelectionMerge
OpLoopMerge
Header Block
: A block containing a
merge instruction
Loop Header
: A
header block
whose merge instruction is an
OpLoopMerge
Selection Header
: A
header block
whose merge instruction is an
OpSelectionMerge
and whose termination instruction is an
OpBranchConditional
Switch Header
: A
header block
whose merge instruction is an
OpSelectionMerge
and whose termination instruction is an
OpSwitch
Merge Block
: A block declared by the
Merge Block
operand of a
merge instruction
Branch Edge
: There is a
branch edge
from block
to block
if the terminator of
is a
branch instruction
and
is one of the target blocks for the branch instruction.
Merge Edge
: There is a
merge edge
from block
to block
if
contains a
merge instruction
and
is the
merge block
of this merge instruction.
Continue Edge
: There is a
continue edge
from block
to block
if
is a
loop header
and
is the
Continue Target
of the loop header’s
OpLoopMerge
instruction.
Structured Control-Flow Edge
: There is a
structured control-flow edge
from block
to block
if there is a
branch edge
merge edge
, or
continue edge
from
to
Back Edge
: A
branch edge
that
branches to one of its ancestors in a depth-first search over
structured control-flow edges
starting
at the function’s entry block.
Note: When all loops are structured, each
back edge
corresponds to exactly
one loop header, and vice versa, making this set of back edges invariant with
respect to which depth-first search found them.
This implies that the CFG defined by the function’s structured control-flow edges is reducible.
Back-Edge Block
: If there is a
back edge
from block
to block
then
is a
back-edge block
Path
: A sequence of blocks
, …,
where for each 0 <=
there is a
branch edge
from
to
i+1
This forms a
path
from
to
Structured Control-Flow Path
: A sequence of blocks
, …,
where for each 0 <=
there is a
structured control-flow edge
from
to
i+1
This forms a
structured control-flow path
from
to
Structurally Reachable
: A block
is
structurally reachable
if there exists a
structured control-flow path
from the entry block of the function containing
to
Dominate
: A block
dominates
a block
, where
and
are in the same function, if every
path
from the function’s
entry block to block
includes block
strictly dominates
if
dominates
and
and
are different blocks.
Structurally Dominate
: A block
structurally dominates
a block
, where
and
are in the same function, if every
structured control-flow path
from the function’s
entry block to block
includes block
strictly structurally dominates
if
structurally dominates
and
and
are different blocks.
Structurally Post Dominate
: A block
structurally post dominates a block
, where
and
are in the same function,
if every
structured control-flow path
from
to a
function termination instruction
includes block
Invocation
: A single execution of an entry point in a SPIR-V module,
operating only on the amount of data explicitly exposed by the semantics of the instructions.
(Any implicit operation on additional instances of data would comprise additional invocations.)
For example, in compute execution models, a single invocation operates only on a single work item, or,
in a vertex execution model, a single invocation operates only on a single vertex.
Quad
: The execution environment can partition invocations into
quads
, where invocations within a quad can
synchronize and share data with each other efficiently.
See the client API specification for more details. It has a size of exactly 4 invocations.
Quad index
: The index of an invocation in a
quad
Subgroup
: Invocations are partitioned into subgroups, where invocations within a subgroup can synchronize
and share data with each other efficiently.
In compute models, the current workgroup is a superset of the subgroup.
A subgroup’s size is defined by the maximum of the current values of the
SubgroupSize
and
SubgroupMaxSize
built-in variables
Cluster
: A partition of invocations in a subgroup.
Invocations are partitioned into clusters based on their subgroup local invocation ID and the per-instruction cluster size
ClusterSize
, with
ClusterSize
invocations per cluster.
The first
ClusterSize
invocations with the smallest subgroup local invocation IDs are assigned to the first cluster, then the next
ClusterSize
remaining invocations with the smallest local invocation IDs are assigned to the next cluster, and so on.
If the current value of the
SubgroupSize
built-in variable
is not evenly divisible by the cluster size then the additional invocations in the last cluster are considered not part of the
tangle
Workgroup
: The set of invocations partitioned in some execution models (e.g. GLCompute, Kernel) as a workgroup.
Its size is defined statically by either the
WorkgroupSize
built-in
or the
LocalSize
or
LocalSizeId
Execution Modes
, or can be queried via the
WorkgroupSize
built-in
These values can be defined in multiple dimensions, and its total size is the product of the size in each specified dimension.
Invocation Group
: The complete set of invocations collectively processing a particular compute workgroup
or graphical operation, where the scope of a "graphical operation" is implementation dependent,
but at least as large as a single point, line, triangle, or patch, and at most as large
as a single rendering command, as defined by the client API.
Derivative Group
: Defined only for the
Fragment
Execution Model
The set of invocations collectively processing derivatives, which is at most as large as a single point, line, or triangle,
including any helper invocations, as defined by the client API.
Scope
: A specific set of invocations that are related to each other as defined by
Scope
Each invocation belongs to one or more
scopes
, but belongs to no more than one
scope
for each
Scope
Tangle
: The set of invocations that execute the same
dynamic instance
of an instruction.
Tangled invocations
: Invocations in the same tangle.
Scope Restricted Tangle
: A set of invocations in the same
tangle
and within the same
scope
Tangled Instruction
: One of:
Group and subgroup instructions
Non-uniform instructions
OpControlBarrier
OpGroupReserveReadPipePackets
OpGroupReserveWritePipePackets
OpGroupCommitReadPipe
and
OpGroupCommitWritePipe
Derivative instructions
Image instructions
that consume an implicit derivative
Tangled instructions communicate between invocations.
Dynamic Instance
Within a single invocation, a single static instruction can be executed multiple times, giving multiple dynamic instances of that instruction.
This can happen if the instruction is executed in a loop, or in a function called from multiple call sites, or combinations of multiple of these.
Different loop iterations and different dynamic function-call-site chains yield different dynamic instances of such an instruction.
Additionally, a single dynamic instance may be executed by multiple invocations.
At the
entry point
, all invocations (in the
invocation group
, unless otherwise stated) execute the same dynamic instance of the first instruction in the entry point function.
Invocations will continue to execute the same dynamic instances as long as they follow the same control-flow path.
When invocations execute a
conditional branch
and begin following different control flow paths, they execute different dynamic instances according to the path taken.
Invocations that have taken different control flow paths may resume executing the same dynamic instances if their execution reaches the same static instruction.
Invocations may only resume executing the same dynamic instances when all invocations reach the same static instruction.
Unless otherwise indicated, the only reconvergence conditions are those described in the definition of
uniform control flow
Program Order
: Program order is an ordering on
dynamic instances
of instructions executed by a single shader invocation. A
dynamic instance
A'
of an instruction
is program-ordered before a
dynamic instance
B'
of an instruction
(and
B'
is program-ordered after
A'
) if and only if:
and
are in the same basic block,
is listed in the module before
, and
A'
is the n’th dynamic instance of
and
B'
is the n’th dynamic instance of B.
is a
branch instruction
is
OpLabel
, and
A'
branches to
B'
is
OpFunctionCall
is
OpFunction
, and
A'
calls
B'
is
OpReturn
or
OpReturnValue
, and
B'
is program-ordered after the
OpFunctionCall
which called the function which executed
A'
A'
is program-ordered before a
dynamic instance
X'
, and
X'
is program-ordered before
B'
Dynamically Uniform
: An
is dynamically uniform for a
dynamic instance
consuming it if its value is the same for all invocations
(in the
invocation group
, unless otherwise stated) that execute that dynamic instance.
Uniform Control Flow
: Uniform control flow (or converged control flow) is
the state when all invocations (in the
invocation group
, unless otherwise stated)
execute the same dynamic instance of an instruction.
Uniform control flow is the initial state at the entry point, and lasts until
conditional branch
takes different control paths for different invocations (non-uniform or divergent control flow).
Such divergence can reconverge, with all the invocations once again executing the same control-flow path,
and this re-establishes the existence of uniform control flow.
If control flow is uniform upon entry into a structured loop or selection,
and all invocations leave that loop or selection via the header block’s declared merge block,
then control flow reconverges to be uniform at that merge block.
2.2.6. Validity and Defined Behavior
Undefined Behavior
: No specific behavior is required by this specification.
If performing an operation would result in undefined behavior, behavior for the entire module is undefined.
Typically results from execution of an instruction violating a requirement of the specification.
SPIR-V consumers may assume that a
valid module
will not execute code that results in undefined behavior.
Poison
: A value that when consumed by operations, if it is not actively prevented from propagating, is either propagated or results in
undefined behavior
Poison values are only initially generated by instructions that explicitly state they are generated, or as a result of propagation.
Dereferencing a pointer that is poison is
undefined behavior
Conditional branch instructions
that consume poison result in
undefined behavior
Poison values are considered distinct from any valid value for an object; consuming a poison value where specific valid values are required is always
undefined behavior
If poison is consumed by an instruction in any other way, it will be propagated to the result and memory locations stored to by that instruction unless explicitly otherwise stated (e.g. see
OpPhi
and
OpSelect
).
Individual scalar elements of a
composite
can independently be poison or not; consuming poison from one scalar element does not automatically propagate that poison to other scalar elements which would not be modified under normal operation.
Undefined Value
: A value that when consumed by operations evaluates to any value of the given type.
Every time an
with an undefined value is consumed, it may evaluate to a different value.
Undefined values are only generated by instructions that explicitly state they are generated, or as the result of operations on an existing undefined value.
Individual scalar elements of a
composite
can independently have undefined values or not.
Conditional branch instructions
that consume an undefined value result in
undefined behavior
If consuming an undefined value could evaluate to a value that would result in
undefined behavior
, consuming that undefined value results in
undefined behavior
The evaluated values of an undefined value may be constrained; for example, multiplying an undefined value by 2 results in an undefined value which can only evaluate to even values.
If an undefined value is constrained to a single possible value, it becomes a
stable value
Note
While
poison
and
undefined values
appear fairly distinct, they have very similar behavior in practice.
The key difference is that an undefined value can be constrained to a limited set of values, whereas poison cannot - transformations all result in poison.
For instance, in the following code using an undefined value,
%result
would always be 0.
%uint = OpTypeInt 32 0
%two = OpConstant %uint 2
%undef = OpUndef %uint
%even = OpIMul %undef %two
%result = OpUMod %even %two
However, if the same code were written with poison as input,
%even
would
not be even;
%even
and
%result
are poison:
%uint = OpTypeInt 32 0
%ptr = OpTypePointer Function %uint
%two = OpConstant %uint 2
%psnptr = OpVariable %ptr Function
%poison = OpLoad %uint %psnptr
%even = OpIMul %poison %two
%result = OpUMod %even %two
Notably, in both examples the code is valid and has no undefined behavior.
Stable Value
: Stable values are consistent at all times.
When an
with a stable value is consumed, it always evaluates to the same value.
Any values that are not
poison
or
undefined
are stable values.
Valid Module
: Most SPIR-V rules are expressed statically.
These
statically expressed rules
are based on what can be seen with a
direct static examination of the module in the specific places the rule says
to look.
These are expressed using terms like
must
must not
valid
not valid
, and
invalid
Such rules establish whether the module is classified as valid or not valid,
which in turn provides terms that tools may use in labeling and describing
modules they process.
A module is valid only if it does not violate any of these statically
expressed rules.
Such rules might not be considered violated if a specialization constant is
involved, as described in the
specialization
constant section
A module having
undefined behavior
is independent
of a module being valid.
Tools may be able to deduce from a static module that
behavior will be undefined
if some part were to be executed, and alert
a user to that fact.
However, this does not allow the tool to classify the module as invalid.
Sometimes, SPIR-V refers to the client API to specify what is statically
valid or dynamically defined for a specific situation, in which case those
rules come from the client API’s execution environment.
Otherwise, a SPIR-V client API can define an execution environment that adds
additional statically expressed rules, further constraining what SPIR-V
itself said was valid.
However, a client cannot remove any such statically expressed rules.
A client will not remove any undefined behavior specified by SPIR-V.
Client APIs are not required to handle invalid modules.
2.3. Physical Layout of a SPIR-V Module and Instruction
A SPIR-V module is a single linear stream of
words
. The first words are shown in the following table:
Table 1. First Words of Physical Layout
Word Number
Contents
Magic Number
Version number. The bytes are, high-order to low-order:
0 | Major Number | Minor Number | 0
Hence, version 1.3 is the value 0x00010300.
Generator’s magic number. It is associated with the tool that generated the module. Its value does not affect any semantics, and is allowed to be 0.
Using a non-0 value is encouraged, and can be registered with Khronos at
Bound
; where all
in this module are guaranteed to satisfy
0 < id < Bound
Bound
should be small, smaller is better, with all
in a module being densely packed and near 0.
0 (Reserved for instruction schema, if needed.)
First word of instruction stream, see below.
All remaining words are a linear sequence of instructions.
Each instruction is a stream of
words
Table 2. Instruction Physical Layout
Instruction Word Number
Contents
Opcode: The 16 high-order bits are the
WordCount
of the instruction. The 16 low-order bits are the opcode enumerant.
Optional instruction type
(presence determined by opcode).
Optional instruction
Result
(presence determined by opcode).
Operand 1 (if needed)
Operand 2 (if needed)
…
…
WordCount
- 1
Operand
is determined by WordCount minus the 1 to 3 words used for the opcode, instruction type
, and instruction
Result
).
Instructions are variable length due both to having optional instruction type
and
Result
words as well as a variable number of operands.
The details for each specific instruction are given in the
Binary Form
section.
2.4. Logical Layout of a Module
The instructions of a SPIR-V module must be in the following order.
For sections earlier than function definitions, it is invalid to use instructions other than those indicated.
All
OpCapability
instructions.
Optional
OpExtension
instructions (extensions to SPIR-V).
Optional
OpExtInstImport
instructions.
The single required
OpMemoryModel
instruction.
All entry point declarations, using
OpEntryPoint
All
execution-mode
declarations, using
OpExecutionMode
or
OpExecutionModeId
These
debug
instructions, which must be grouped in the following order:
All
OpString
OpSourceExtension
OpSource
, and
OpSourceContinued
, without forward references.
All
OpName
and all
OpMemberName
All
OpModuleProcessed
instructions.
All
annotation
instructions:
All decoration instructions.
All type declarations (
OpTypeXXX
instructions), all
constant instructions
, and all global variable declarations
(all
OpVariable
instructions whose
Storage Class
is not
Function
).
This is the preferred location for
OpUndef
instructions, though they can also appear in function bodies.
All operands in all these instructions must be declared before being used. Otherwise, they can be in any order.
This section is the first section to allow use of:
OpLine
and
OpNoLine
debug information.
Non-semantic instructions
with
OpExtInst
All function declarations ("declarations" are functions without a body; there is no forward declaration to a function with a body). A function declaration is as follows.
Function declaration, using
OpFunction
Function parameter declarations, using
OpFunctionParameter
Function end, using
OpFunctionEnd
All function definitions (functions with a body). A function definition is as follows.
Function definition, using
OpFunction
Function parameter declarations, using
OpFunctionParameter
Block.
Block.
…
Function end, using
OpFunctionEnd
Within a function definition:
A block always starts with an
OpLabel
instruction.
This may be immediately preceded by an
OpLine
instruction, but the
OpLabel
is considered as the beginning of the block.
A block always ends with a
block termination instruction
(see
validation rules
for more detail).
All
OpVariable
instructions in a function must have a
Storage Class
of
Function
All
OpVariable
instructions in a function must be in the first block in the function.
These instructions, together with any intermixed
OpLine
and
OpNoLine
instructions, must be the first instructions in that block.
(Note the validation rules prevent
OpPhi
instructions in the first block of a function.)
A function definition (starts with
OpFunction
) can be immediately preceded by an
OpLine
instruction.
Forward references (an operand
that appears before the
Result
defining it) are allowed for:
Operands that are an
OpFunction
. This allows for recursion and early declaration of entry points.
Annotation
-instruction operands. This is required to fully know everything about a type or variable once it is declared.
Labels.
OpPhi
can contain forward references.
OpTypeForwardPointer
An
OpTypeForwardPointer
Pointer Type
is a forward reference to
an
OpTypePointer
Subsequent consumption of an
OpTypeForwardPointer
Pointer Type
can be a forward reference.
The list of
provided in the
OpEntryPoint
instruction.
OpExecutionModeId
In all cases, there is enough type information to enable a single simple pass through a module to transform it.
For example, function calls have all the type information in the call, phi-functions don’t change type, and labels don’t have type.
The pointer forward reference allows structures to contain pointers to themselves or to be mutually recursive (through pointers),
without needing additional type information.
The
Validation Rules
section lists additional rules.
2.5. Instructions
Most instructions create a
Result
, as provided in the
Result
field of the instruction.
These
Result
are then referred to by other instructions through their
operands.
All instruction operands are specified in the
Binary Form
section.
Instructions are explicit about whether an operand is (or is part of) a self-contained
literal
or
an
referring to another instruction’s result.
While an
always takes one operand, one literal takes one or more operands.
Some common examples of
literals
A literal 32-bit (or smaller) integer is always one operand directly holding a 32-bit two’s-complement value.
A literal 32-bit float is always one operand, directly holding a 32-bit IEEE 754 floating-point representation.
A literal 64-bit float is always two operands, directly holding a 64-bit IEEE 754 representation.
The low-order 32 bits appear in the first operand.
2.5.1. SSA Form
A module is always in static single assignment (SSA) form. That is, there is always exactly one instruction resulting in any particular
Result
Storing into variables declared in memory is not subject to this; such stores do not create
Result
. Accessing declared variables is done through:
OpVariable
to allocate an object in memory and create a
Result
that is the name of a pointer to it.
OpAccessChain
or
OpInBoundsAccessChain
to create a pointer to a subpart of a
composite
object in memory.
OpLoad
through a pointer, giving the loaded object a
Result
that can then be used as an operand in other instructions.
OpStore
through a pointer, to write a value. There is no
Result
for an
OpStore
OpLoad
and
OpStore
instructions can often be eliminated, using
intermediate
results instead.
If this happens in multiple control-flow paths, these values need to be merged again at the path’s merge point.
Use
OpPhi
to merge such values together.
2.6. Entry Point and Execution Model
The
OpEntryPoint
instruction identifies an
entry point
with two key things:
an execution model and a function definition.
Execution models include
Vertex
GLCompute
, etc. (one for each graphical stage),
as well as
Kernel
for OpenCL kernels.
For the complete list, see
Execution Model
An
OpEntryPoint
also supplies a name that can be used externally to identify the entry point,
and a declaration of all the
Input
and
Output
variables that form its input/output interface.
The static function call graphs rooted at two entry points are allowed to overlap,
so that function definitions and global variable definitions can be shared.
The execution model and any execution modes associated with an entry point apply to
the entire static function call graph rooted at that entry point.
This rule implies that a function appearing in both call graphs of two distinct entry points may behave
differently in each case.
Similarly, variables whose semantics depend on properties of an entry point, e.g. those using
the
Input
Storage Class
may behave differently if used in call graphs rooted in two different entry points.
2.7. Execution Modes
Information like the following is declared with
OpExecutionMode
instructions.
For example,
number of invocations (
Invocations
vertex-order CCW (
VertexOrderCcw
triangle strip generation (
OutputTriangleStrip
number of output vertices (
OutputVertices
etc.
For a complete list, see
Execution Mode
2.8. Types and Variables
Types are built up hierarchically, using
OpTypeXXX
instructions.
The
Result
of an
OpTypeXXX
instruction becomes
a type
for future use where type
are needed
(therefore,
OpTypeXXX
instructions do not have a type
, like most other instructions do).
The "leaves" to start building with are types like
OpTypeFloat
OpTypeInt
OpTypeImage
OpTypeEvent
, etc.
Other types are built up from the
Result
of these.
The numerical types are parameterized to specify bit width and signed vs. unsigned.
Higher-level types are then constructed using opcodes like
OpTypeVector
OpTypeMatrix
OpTypeImage
OpTypeArray
OpTypeRuntimeArray
OpTypeStruct
, and
OpTypePointer
These are parameterized by number of components, array size, member lists, etc.
The image types are parameterized by their sampling result type, dimensionality, arrayness, etc.
To do sampling or filtering operations, a type from
OpTypeSampledImage
is used that contains both an
image
and a
sampler
Such a
sampled image
can be set directly by the client API
or combined in a SPIR-V module from an independent image and an independent sampler.
Types are built bottom up: A parameterizing operand in a type must be defined before being used.
Some additional information about the type of an
can be provided using the decoration instructions
OpDecorate
OpMemberDecorate
OpGroupDecorate
OpGroupMemberDecorate
, and
OpDecorationGroup
).
These can add, for example,
Invariant
to an
created by another instruction.
See the full list of
Decorations
in the
Binary Form
section.
Two different type
form, by definition, two different types.
It is invalid to declare multiple non-aggregate, non-pointer type
having the same opcode and operands.
It is valid to declare multiple
aggregate
type
having the same opcode and operands.
This is to allow multiple instances of aggregate types with the same structure to be
decorated
differently.
(Different decorations are not required;
two different aggregate type
are allowed to have identical declarations and decorations,
and will still be two different types.)
Pointer types are also allowed to have multiple
for the same opcode and operands,
to allow for differing decorations (e.g.,
Volatile
) or different decoration values
(e.g., different
Array Stride
values for the
ArrayStride
).
If new pointers are formed, their types must be decorated as needed,
so the consumer knows how to generate an access through the pointer.
Variables are declared to be of an already built type, and placed in a Storage Class.
Storage classes include
UniformConstant
Input
Workgroup
, etc.
and are fully specified in
Storage Class
Variables declared with the
Function
Storage Class can have their lifetime’s specified within their function using
the
OpLifetimeStart
and
OpLifetimeStop
instructions.
Intermediate results are typed by the instruction’s type
which is constrained by each instruction’s description.
Built-in variables have special semantics and are declared using
OpDecorate
or
OpMemberDecorate
with the
BuiltIn
Decoration
followed by a
BuiltIn
enumerant.
See the
BuiltIn
section for details on what can be decorated as a built-in variable.
2.8.1. Unsigned Versus Signed Integers
The integer type,
OpTypeInt
, is parameterized not only with a size, but also with signedness.
There are two different ways to think about signedness in SPIR-V, both are internally consistent and acceptable:
As if all integers are "signless", meaning they are neither signed nor unsigned:
All
OpTypeInt
instructions select a signedness of 0 to conceptually mean "no sign" (rather than "unsigned").
This is useful if translating from a language that does not distinguish between signed and unsigned types.
The type of operation (signed or unsigned) to perform is always selected by the choice of opcode.
As if some integers are signed, and some are unsigned:
Some
OpTypeInt
instructions select signedness of 0 to mean "unsigned"
and some select signedness of 1 to mean "signed".
This is useful if signedness matters to external interface,
or if targeting a higher-level language that cares about types being signed and unsigned.
The type of operation (signed or unsigned) to perform is still always selected by the choice of opcode,
but a small amount of validation can be done where it is non-sensible to use a signed type.
Note in both cases all signed and unsigned operations always work on unsigned types,
and the semantics of operation come from the opcode.
SPIR-V does not know which way is being used; it is set up to support both ways of thinking.
Note that while SPIR-V aims to not assign semantic meaning to the signedness bit in choosing how to operate on values,
there are a few cases known to do this, all confined to modules declaring the
Shader
capability:
validation for consistency checking for front ends for directly contradictory usage, where explicitly indicated in
this specification
interfaces that might require widening of an input value, and otherwise don’t know whether to sign extend or zero
extend, including the following bullet
an image read that might require widening of an operand, in versions where the
SignExtend
and
ZeroExtend
image operands
are not available
(if available, these operands are the supported way to communicate this).
2.9. Function Calling
To call a function defined in the current module or a function declared to be imported from another module,
use
OpFunctionCall
with an operand that is the
of the
OpFunction
to call,
and the
of the arguments to pass.
All arguments are passed by value into the called function.
This includes pointers, through which a callee object could be modified.
2.10. Extended Instruction Sets
Many operations and/or built-in function calls from high-level languages are represented through
extended instruction sets
Extended instruction sets include things like
trigonometric functions: sin(), cos(), …
exponentiation functions: exp(), pow(), …
geometry functions: reflect(), smoothstep(), …
functions having rich performance/accuracy trade-offs
etc.
Non-extended instructions, those that are core SPIR-V instructions, are listed in the
Binary Form
section.
Native operations include:
Basic arithmetic: +, -, *, min(), scalar * vector, etc.
Texturing, to help with back-end decoding and support special code-motion rules.
Derivatives, due to special code-motion rules.
Extended instruction sets are specified in independent specifications, not in this specification.
The separate extended instruction set specification specifies instruction opcodes, semantics, and instruction names.
To use an extended instruction set, first import it by name string using
OpExtInstImport
and giving it a
Result
Where "name-of-extended-instruction-set" is a
literal
string.
The standard convention for this string is
"
For example "GLSL.std.450" could be the name of the core built-in functions for GLSL versions 450 and earlier.
Note
There is nothing precluding having two "mirror" sets of instructions with different names but the same opcode values,
which could, for example, let modifying just the import statement to change a performance/accuracy trade off.
Then, to call a specific extended instruction, use
OpExtInst
OpExtInst
Extended instruction-set specifications provide semantics for each "instruction-number".
It is up to the specific specification what the overloading rules are on operand type.
The specification will be clear on its semantics, and producers/consumers of it must follow those semantics.
By convention, it is recommended that all external specifications include an
enum
{…} listing all
the "instruction-numbers", and a mapping between these numbers and a string representing the
instruction name.
However, there are no requirements that instruction name strings are provided or mangled.
Note
Producing and consuming extended instructions can be done entirely through numbers (no string parsing).
An extended instruction set specification provides opcode enumerant values for the instructions,
and these are produced by the front end and consumed by the back end.
2.11. Structured Control Flow
SPIR-V can explicitly declare structured control-flow
constructs
using
merge instructions
These explicitly declare a
header block
before the control flow diverges and a
merge block
where control flow subsequently converges.
(Control flow may partially or fully reconverge before reaching the merge block so long as it converges
by the time the merge block is reached.)
These blocks delimit constructs that must nest, and must be entered and exited in structured ways,
as per the following.
2.11.1. Rules for Structured Control-flow Declarations
Structured control flow declarations must satisfy the following rules:
the
merge block
declared by a
header block
must not be a merge block declared by any other header block
each header block must
strictly structurally dominate
its merge block
all
back edges
must branch to a
loop header
with each loop header having exactly one back edge branching to it
for a given loop header, its
merge block
OpLoopMerge
Continue Target
, and corresponding
back-edge block
the
Continue Target
and
merge block
must be different blocks
the
loop header
must structurally dominate the
Continue Target
the
Continue Target
must structurally dominate the
back-edge block
the
back-edge block
must
structurally post dominate
the
Continue Target
2.11.2. Structured Control-flow Constructs
A structured control-flow
construct
is defined as one of:
selection construct
: the blocks structurally dominated by a
selection header
excluding blocks structurally dominated by the selection header’s merge block
continue construct
: the blocks that are both structurally dominated by an
OpLoopMerge
Continue Target
and structurally post dominated by the corresponding loop’s back-edge block
loop construct
: the blocks structurally dominated by a
loop header
excluding both the loop header’s
continue construct
and the blocks structurally dominated by the loop header’s merge block
switch construct
: the blocks structurally dominated by a
switch header
excluding blocks structurally dominated by the switch header’s merge block
case construct
: the blocks structurally dominated by an
OpSwitch
Target
or
Default
block, excluding the blocks structurally dominated by the
OpSwitch
construct’s corresponding merge block
(note that as a consequence of this definition, an
OpSwitch
Target
or
Default
block that is equal to the
OpSwitch’s
corresponding merge block does not give rise to a case construct)
2.11.3. Rules for Structured Control-flow Constructs
Below, we will use the following terminology:
A branch edge from block
to block
exits
a structured control-flow construct
if and only if
is contained in
and
is not contained in
single-block loop
is a loop construct where the loop’s header block, continue target and back-edge block are all the same.
The
header block
of a continue construct is the continue target of the associated loop.
The
header block
of a case construct is the
OpSwitch
Target
or
Default
block that defines the case construct.
If the header block of a structured control-flow construct is
structurally reachable
then that structured control-flow construct must satisfy the following rules:
if a branch edge from block
to block
exits the structured control-flow construct
, then the exit must correspond to one of the following:
Breaking from a selection construct:
is a selection construct,
is the innermost structured control-flow construct containing
, and
is the merge block for
Breaking from the innermost loop:
is the innermost loop construct containing
, and
is the merge block for
Entering the innermost loop’s continue construct:
is the innermost loop construct containing
, and
is the continue target for
Next loop iteration: the branch edge from
to
is a
back edge
(so that
is the continue construct of the associated loop)
Branching from back-edge block to loop merge:
is the back-edge block for a loop construct (so that
is the continue construct of the associated loop), and
is the merge block for the loop construct
Branching from one case construct to another:
is a case construct associated with an
OpSwitch
instruction, and
is a target block or default block associated with the
OpSwitch
instruction
Breaking from the innermost switch construct without breaking from a loop:
is the innermost switch construct containing
is the merge block for
, and the branch from
to
does not exit a loop construct
a branch edge that exits a continue construct must branch to the header block or merge block of the associated loop
for a loop construct that is not a single block loop, if there is a branch edge from a block
to the loop’s continue target that is not a
back edge
, then
must belong to the loop construct
if a structured control-flow construct
contains the header block for a selection, loop or switch construct different from
, then
must also contain that construct’s merge block
all branches into a selection, loop or switch construct from structurally-reachable blocks outside the construct must be to the construct’s header block
for a switch construct
with associated
OpSwitch
instruction:
the header block for
must
structurally dominate
every
case construct
associated with
each
case construct
associated with
must not branch to more than one other
case construct
associated with
each
case construct
associated with
must not be branched to by more than one other
case construct
associated with
if
T1
and
T2
appear as labels of targets in the
OpSwitch
instruction and the case construct defined by
T1
branches to
the case construct defined by
T2
then the last target with label
T1
must immediately precede
the first target with label
T2
in the list of
OpSwitch
Target
operands
if
T1
and
T2
appear as labels of targets in the
OpSwitch
instruction and the case construct defined by
T1
branches to the
Default
case construct of the
OpSwitch
which in turn
branches to the case construct defined by
T2
, then either:
the block that defines the
Default
case construct must
appear as a target label in the
OpSwitch
instruction, or
the last target with label
T1
must immediately precede the
first target with label
T2
in the list of
OpSwitch
Target
operands
for any label
, all targets with label
must appear consecutively in the list of
OpSwitch
Target
operands
2.12. Specialization
Specialization
is intended for constant objects that will not have known
constant values until after initial generation of a SPIR-V module.
Such objects are called
specialization constants
A SPIR-V module containing specialization constants can consume one or more externally provided
specializations
A set of final constant values for some subset of the module’s
specialization constants
Applying these final constant values yields a new module having fewer remaining specialization constants.
A module also contains default values for any specialization constants that never get externally specialized.
Note
No optimizing transforms are required to make a
specialized
module functionally correct.
The specializing transform is straightforward and explicitly defined below.
Note
Ad hoc specializing should not be done through constants
OpConstant
or
OpConstantComposite
) that get overwritten:
A SPIR-V → SPIR-V transform might want to do something irreversible with the value of such a constant,
unconstrained from the possibility that its value could be later changed.
Within a module, a
Specialization Constant
is declared with one of these instructions:
OpSpecConstantTrue
OpSpecConstantFalse
OpSpecConstant
OpSpecConstantComposite
OpSpecConstantOp
The
literal
operands to
OpSpecConstant
are the default numerical specialization constants.
Similarly, the "
True
" and "
False
" parts of
OpSpecConstantTrue
and
OpSpecConstantFalse
provide the default Boolean specialization constants. These default values make an external specialization optional.
However, such a default constant is applied only after all external specializations are complete, and none contained a specialization for it.
An external specialization is provided as a logical list of pairs.
Each pair is a
SpecId
Decoration
of a scalar specialization instruction along with its specialization constant.
The numeric values are exactly what the operands would be to a corresponding
OpConstant
instruction.
Boolean values are true if non-zero and false if zero.
Specializing a module is straightforward.
The following specialization-constant instructions can be updated with specialization constants.
These can be replaced in place, leaving everything else in the module exactly the same:
OpSpecConstantTrue -> OpConstantTrue or OpConstantFalse
OpSpecConstantFalse -> OpConstantTrue or OpConstantFalse
OpSpecConstant -> OpConstant
OpSpecConstantComposite -> OpConstantComposite
Note that the
OpSpecConstantOp
instruction is not one that can be updated with a specialization constant.
The
OpSpecConstantOp
instruction is specialized by executing the operation and replacing the instruction with the result.
The result can be expressed in terms of a
constant instruction
that is not a specialization-constant instruction.
(Note, however, this resulting instruction might not have the same size as the original instruction, so is not a "replaced in place" operation.)
When applying an external specialization, the following (and only the following) will be modified to be non-specialization-constant instructions:
specialization-constant instructions with values provided by the specialization
specialization-constant instructions that consume nothing but non-specialization constant instructions
(including those that the partial specialization transformed from specialization-constant instructions; these are in order, so it is a single pass to do so)
A full specialization can also be done, when requested or required, in which all specialization-constant instructions will be modified to non-specialization-constant instructions,
using the default values where required.
If
a statically expressed rule
would be broken due to the value of a constant,
and that constant is a specialization constant, then that rule is not violated.
(Consequently, specialization-constant default values are not relevant to the validity of the module.)
2.13. Linkage
The ability to have partially linked modules and libraries is provided as part of the
Linkage
capability.
By default, functions and global variables are private to a module and cannot be accessed by other modules.
However, a module may be written to
export
or
import
functions and global (module scope) variables.
Imported functions and global variable definitions are resolved at linkage time.
A module is considered to be partially linked if it depends on imported values.
Within a module, imported or exported values are decorated using the
Linkage Attributes
Decoration
This decoration assigns the following linkage attributes to decorated values:
Linkage Type
name
, interpreted is a
literal
string, is used to uniquely identify exported values.
Note
When resolving imported functions, the
Function Control
and all
Function Parameter Attributes
are taken from the function definition, and not from the function declaration.
2.14. Relaxed Precision
The
RelaxedPrecision
Decoration
allows 32-bit integer and 32-bit floating-point operations to execute
with a relaxed precision of somewhere between 16 and 32 bits.
For a floating-point operation, operating at relaxed precision means that the minimum requirements for range and
precision are as follows:
the floating point range may be as small as (-2
14
, 2
14
the floating point magnitude range includes 0.0 and [2
-14
, 2
14
the relative floating point precision may be as small as 2
-10
The
range notation
here means the largest required magnitude is half of the relative precision less
than the value given.
Relative floating-point precision is defined as the worst case (i.e. largest) ratio of the smallest step in relation to
the value for all non-zero values in the required range:
Precision
relative
= (abs(v
- v
min
/ abs(v
))
max
for v
≠ 0, v
≠ 0, v
≠ v
It is therefore twice the maximum rounding error when converting from a real number.
Subnormal numbers may be supported and may have lower relative precision.
For integer operations, operating at relaxed precision means that the operation is evaluated by an operation in
which, for some
, 16 ≤
≤ 32:
the operation is executed as though its type were
bits in size, and
the result is zero or sign extended to 32 bits as determined by the signedness of the result type of the operation.
The
RelaxedPrecision
Decoration
must only be applied to:
The
of an
OpVariable
, where it refers to the value of the variable.
The
of an
OpFunctionParameter
, where it refers to the value of the parameter.
The
Result
of an instruction that reads or filters from an image. E.g.
OpImageSampleExplicitLod
meaning the instruction is to operate at relaxed precision.
The
Result
of an
OpFunction
, where it refers to the value returned by the function.
A structure-type member (through
OpMemberDecorate
).
The
Result
of an
OpFunctionCall
, where it refers to the result of the function call.
The
Result
of other instructions that operate on numerical types, meaning the instruction is to operate at relaxed precision.
The instruction’s operands may also be truncated to the relaxed precision.
In all cases, the types of the values that the
RelaxedPrecision
Decoration
refers to must be:
a scalar, vector, or matrix, or array of scalars, vectors, or matrices, and all the components in the
types must be a 32-bit
numerical
type,
a pointer to such a type, where it refers to the value pointed to.
The values that the
RelaxedPrecision
Decoration
refers to can be truncated to relaxed precision.
When applied to a variable, function parameter, or structure member, all loads and stores from the decorated object may be treated as though they were
decorated
with
RelaxedPrecision
Loads may also be decorated with
RelaxedPrecision
, in which case they are treated as operating at relaxed precision.
All loads and stores involving relaxed precision still read and write 32 bits of data, respectively.
Floating-point data read or written in such a manner is written in full 32-bit floating-point format.
However, a load or store might reduce the precision (as allowed by
RelaxedPrecision
) of the destination value.
For debugging portability of floating-point operations,
OpQuantizeToF16
may be used to explicitly reduce the precision of a relaxed-precision result to 16-bit precision.
(Integer-result precision can be reduced, for example, using left- and right-shift opcodes.)
For image-sampling operations, decorations can appear on both the sampling instruction and the image variable being sampled.
If either is decorated, they both should be decorated, and if both are decorated their decorations must match.
If only one is decorated, the sampling instruction can behave either as if both were decorated or neither were decorated.
2.15. Debug Information
Debug information is supplied with:
Source-code text through
OpString
OpSource
, and
OpSourceContinued
Object names through
OpName
and
OpMemberName
Line numbers through
OpLine
and
OpNoLine
A module does not lose any semantics when all such instructions are removed.
2.15.1. Function-Name Mangling
There is no functional dependency on how functions are named.
Signature-typing information is explicitly provided, without any need for name "unmangling".
By convention, for debugging purposes, modules with
OpSource
Source Language
of OpenCL use the Itanium name-mangling standard.
2.16. Validation Rules
2.16.1. Universal Validation Rules
When using
OpBitcast
to convert pointers to/from vectors of integers, only
vectors of 32-bit integers are allowed.
If neither the
VariablePointers
nor
VariablePointersStorageBuffer
capabilities
are declared,
the following rules apply to
logical pointer types
OpVariable
must not allocate an object whose type is or contains a logical pointer type.
It is invalid for a pointer to be an operand to any instruction other than:
OpLoad
OpStore
OpAccessChain
OpInBoundsAccessChain
OpFunctionCall
OpImageTexelPointer
OpCopyMemory
OpCopyObject
OpArrayLength
OpDecorate
OpDecorateId
OpGroupDecorate
OpDecorateString
OpEntryPoint
OpName
all
OpAtomic
instructions
extended instruction-set instructions that are explicitly identified as taking pointer operands
It is invalid for a pointer to be the
Result
of any instruction other than:
OpVariable
OpAccessChain
OpInBoundsAccessChain
OpFunctionParameter
OpImageTexelPointer
OpCopyObject
OpUndef
All indexes in
OpAccessChain
and
OpInBoundsAccessChain
that are
OpConstant
with type of
OpTypeInt
with a
signedness
of 1 must not have their sign bit set.
Any pointer operand to an
OpFunctionCall
must point into one of the following
storage classes
UniformConstant
Function
Private
Workgroup
AtomicCounter
Any pointer operand to an
OpFunctionCall
must be
memory object declaration
, or
a pointer to an element in an array that is a memory object declaration,
where the element type is
OpTypeSampler
or
OpTypeImage
The instructions
OpPtrEqual
and
OpPtrNotEqual
must not be used.
If the
VariablePointers
or
VariablePointersStorageBuffer
capability
is declared, the following are additionally allowed for
logical pointer types
while other prohibitions remain:
If
OpVariable
allocates an object whose type is or contains a
logical pointer type
the
Storage Class
operand of the
OpVariable
must be one of the following:
Function
Private
If a pointer is the
Object
operand of
OpStore
or result of
OpLoad
the storage class the pointer is stored to or loaded from must be one of the following:
Function
Private
A pointer type can be the:
Result Type
of
OpFunction
Result Type
of
OpFunctionCall
Return Type
of
OpTypeFunction
A pointer can be a
variable pointer
A pointer can be an operand to one of:
OpReturnValue
OpPtrAccessChain
OpPtrEqual
OpPtrNotEqual
OpPtrDiff
OpPhi
OpSelect
OpVariable
variable pointer
must point to one of the following
storage classes
StorageBuffer
Workgroup
(if the
VariablePointers
capability
is declared)
If the
VariablePointers
capability
is not declared, a variable pointer must be selected from
pointers pointing into the same structure or be
OpConstantNull
A pointer operand to
OpFunctionCall
can point into the
storage class
StorageBuffer
For pointer operands to
OpFunctionCall
the
memory object declaration
-restriction is removed for the following
storage classes
StorageBuffer
Workgroup
The instructions
OpPtrEqual
and
OpPtrNotEqual
can be used only if
the
Storage Class
of the operands'
OpTypePointer
declaration is
StorageBuffer
if the
VariablePointersStorageBuffer
capability
is explicitly or implicitly declared, whether or not operands point into the same buffer, or
Workgroup
, which can be used only if the
VariablePointers
capability
was declared.
variable pointer
must not:
be an operand to an
OpArrayLength
instruction
point to an array of structures with a structure type decorated with
Block
or
BufferBlock
point to an object that is or contains an
OpTypeMatrix
point to a column, or a component in a column, within an
OpTypeMatrix
Memory model
Memory accesses that use
NonPrivatePointer
must use pointers in the
Uniform
Workgroup
CrossWorkgroup
Generic
Image
, or
StorageBuffer
storage classes
If the
Vulkan
memory model
is declared and any instruction uses
Device
scope
the
VulkanMemoryModelDeviceScope
capability
must be declared.
Physical storage buffer
If the
addressing model
is not
PhysicalStorageBuffer64
then the
PhysicalStorageBuffer
storage class
must not be used.
OpVariable
must not use the
PhysicalStorageBuffer
storage class
Any pointer value whose
storage class
is
PhysicalStorageBuffer
and that points to a matrix,
an array of matrices, or a row or element of a matrix must be the result of
an
OpAccessChain
or
OpPtrAccessChain
instruction
whose
Base
operand is a structure type (or recursively must be the result of a sequence of only access chains from
a structure to the final value). Such a pointer must only be used as the
Pointer
operand to
OpLoad
or
OpStore
The result type of
OpConstantNull
must not be a pointer type with
storage class
PhysicalStorageBuffer
Operands to
OpPtrEqual
OpPtrNotEqual
, and
OpPtrDiff
must not be pointers into the
PhysicalStorageBuffer
storage class
SSA
Each
must appear exactly once as the
Result
of an instruction.
The definition of an SSA
should dominate all uses of it, with the following exceptions:
Function calls may call functions not yet defined.
However, note that the function’s operand and return types are already known at the call site.
An
OpPhi
can consume definitions that do not dominate it.
Entry Point
There is at least one
OpEntryPoint
instruction, unless the
Linkage
capability is declared.
It is invalid for any function to be targeted by both an
OpEntryPoint
instruction
and an
OpFunctionCall
instruction.
Each
OpEntryPoint
must not set more than one of the
DenormFlushToZero
or
DenormPreserve
execution modes
for any given
Target Width
Each
OpEntryPoint
must not set more than one of the
RoundingModeRTE
or
RoundingModeRTZ
execution modes
for any given
Target Width
Each
OpEntryPoint
must contain at most one of
LocalSize
LocalSizeId
LocalSizeHint
, or
LocalSizeHintId
Execution Modes
Functions
A function declaration (an
OpFunction
with no basic blocks), must have a
Linkage Attributes
Decoration
with the
Import
Linkage Type
A function definition (an
OpFunction
with basic blocks) must not be
decorated
with the
Import
Linkage Type
A function must not have both a declaration and a definition (no forward declarations).
Global (Module Scope) Variables
A module-scope
OpVariable
with an
Initializer
operand
must not be decorated with the
Import
Linkage Type
Control-Flow Graph (CFG)
Blocks exist only within a function.
The first block in a function definition is the entry point of that function and must not be the target of any branch.
(Note this means it has no
OpPhi
instructions.)
The order of blocks in a function must satisfy the rule that blocks appear before all blocks they dominate.
Each block starts with a label.
A label is made by
OpLabel
This includes the first block of a function (
OpFunction
is not a label).
Labels are used only to form blocks.
The last instruction of each block is a
block termination instruction
Each
block termination instruction
must be the last instruction in a block.
Each
OpLabel
instruction must be within a function.
All
branches
within a function must be to labels in that function.
All
OpFunctionCall
Function
operands are an
of an
OpFunction
in the same module.
Data rules
Scalar floating-point types must be parameterized only as 32 bit, plus any additional sizes enabled by
capabilities
Scalar integer types must be parameterized only as 32 bit, plus any additional sizes enabled by
capabilities
Vector types must be parameterized only with numerical types or the
OpTypeBool
type.
Vector types must be parameterized only with 2, 3, or 4 components, plus any additional sizes enabled by
capabilities
Matrix types must be parameterized only with floating-point types.
Matrix types must be parameterized only with 2, 3, or 4 columns.
Specialization constants (see
Specialization
) are limited to integers, Booleans, floating-point numbers, and vectors of these.
Image, sampler, and sampled image objects must not appear as operands to
OpPhi
instructions, or
OpSelect
instructions, or
any instructions other than the image or sampler instructions specified to
operate on them.
All
OpSampledImage
instructions must be in the same block in which their
Result
are consumed.
The
capabilities
StorageBuffer16BitAccess
UniformAndStorageBuffer16BitAccess
StoragePushConstant16
, and
StorageInputOutput16
do not generally add 16-bit operations.
Rather, they add only the following specific abilities:
An
OpTypePointer
pointing to a 16-bit scalar, a 16-bit vector,
or a composite containing a 16-bit member can be used as the result type of
OpVariable
or
OpAccessChain
, or
OpInBoundsAccessChain
OpLoad
can load 16-bit scalars, 16-bit vectors, and 16-bit matrices.
OpStore
can store 16-bit scalars, 16-bit vectors, and 16-bit matrices.
OpCopyObject
can be used for 16-bit scalars or composites containing 16-bit members.
16-bit scalars or 16-bit vectors can be used as operands to a width-only conversion
instruction to another allowed type (
OpFConvert
OpSConvert
or
OpUConvert
), and can be produced as results of a width-only conversion instruction
from another allowed type.
A structure containing a 16-bit member can be an operand to
OpArrayLength
The
capabilities
StorageBuffer8BitAccess
UniformAndStorageBuffer8BitAccess
and
StoragePushConstant8
, do not generally add 8-bit operations.
Rather, they add only the following specific abilities:
An
OpTypePointer
pointing to an 8-bit scalar, an 8-bit vector,
or a composite containing an 8-bit member can be used as the result type of
OpVariable
or
OpAccessChain
, or
OpInBoundsAccessChain
OpLoad
can load 8-bit scalars and vectors.
OpStore
can store 8-bit scalars and 8-bit vectors.
OpCopyObject
can be used for 8-bit scalars or composites containing 8-bit members.
8-bit scalars and vectors can be used as operands to a width-only conversion
instruction to another allowed type (
OpSConvert
or
OpUConvert
), and can be produced as results of a width-only conversion instruction
from another allowed type.
A structure containing an 8-bit member can be an operand to
OpArrayLength
Decoration rules
The
Linkage Attributes
Decoration
must not be applied to functions targeted by an
OpEntryPoint
instruction.
BuiltIn
Decoration
must be applied only as follows:
If applied to a structure-type member, all members of that structure type must also be
decorated
with
BuiltIn
(No allowed mixing of built-in variables and non-built-in variables within a single structure.)
If applied to a structure-type member, that structure type must not be contained as a member of another structure type.
There must be no more than one object per Storage Class that contains a structure type containing members
decorated
with
BuiltIn
, consumed per entry-point.
OpLoad
and
OpStore
must consume only objects whose type is a pointer.
Result
resulting from an instruction within a function must be used only in that function.
A function call must have the same number of arguments as the function definition (or declaration) has parameters, and their respective types must match.
An instruction requiring a specific number of operands must have that many operands. The
word count
must agree.
Each opcode specifies its own requirements for number and type of operands, and these must be followed.
Atomic access rules
The pointers taken by atomic operation instructions must be a pointer into one of the following
Storage Classes
Uniform
when used with the
BufferBlock
Decoration
StorageBuffer
PhysicalStorageBuffer
Workgroup
CrossWorkgroup
Generic
AtomicCounter
Image
Function
It is invalid to have a construct that uses the
StorageBuffer
Storage Class
and
a construct that uses the
Uniform
Storage Class
with the
BufferBlock
Decoration
in the same SPIR-V module.
All
XfbStride
Decorations
must be the same for all objects decorated with the same
XfbBuffer
XFB Buffer Number
All
Stream
Decorations
must be the same for all objects decorated with the same
XfbBuffer
XFB Buffer Number
If the workgroup size is statically specified (using the LocalSize, LocalSizeId execution modes, or the WorkgroupSize BuiltIn),
the product of all workgroup size dimensions must not be zero.
2.16.2. Validation Rules for Shader
Capabilities
CFG:
Loops must be structured. That is, the target basic block of a
back edge
must contain an
OpLoopMerge
instruction.
Selections must be structured. That is, an
OpSelectionMerge
instruction is required to precede:
an
OpSwitch
instruction
an
OpBranchConditional
instruction that has different
True Label
and
False Label
operands where neither are
declared
merge blocks
or
Continue Targets
Entry point and execution model
Each
entry point
in a module, along with its corresponding static call tree within that module, forms a complete pipeline stage.
Each
OpEntryPoint
with the
Fragment
Execution Model
must have an
OpExecutionMode
for either the
OriginLowerLeft
or the
OriginUpperLeft
Execution Mode
(Exactly one of these is required.)
An
OpEntryPoint
with the
Fragment
Execution Model
must not set more than one of the
DepthGreater
DepthLess
, or
DepthUnchanged
Execution Modes
An
OpEntryPoint
with one of the
Tessellation
Execution Models
must not set more than one of the
SpacingEqual
SpacingFractionalEven
, or
SpacingFractionalOdd
Execution Modes
An
OpEntryPoint
with one of the
Tessellation
Execution Models
must not set more than one of the
Triangles
Quads
, or
Isolines
Execution Modes
An
OpEntryPoint
with one of the
Tessellation
Execution Models
must not set more than one of the
VertexOrderCw
or
VertexOrderCcw
Execution Modes
An
OpEntryPoint
with the
Geometry
Execution Model
must set exactly one of the
InputPoints
InputLines
InputLinesAdjacency
Triangles
, or
TrianglesAdjacency
Execution Modes
An
OpEntryPoint
with the
Geometry
Execution Model
must set exactly one of the
OutputPoints
OutputLineStrip
, or
OutputTriangleStrip
Execution Modes
For
structure
objects in the
Input
and
Output
Storage Classes
, the following apply:
If applied to structure-type members, the
decorations
Noperspective
Flat
Patch
Centroid
, and
Sample
must be applied only to the top-level members of the structure type.
(Nested objects' types must not be structures whose members are decorated with these decorations.)
Type Rules
All declared types are restricted to those types that are, or are contained within, valid types for an
OpVariable
Result Type
or an
OpTypeFunction
Return Type
Aggregate types for
intermediate objects
are restricted to those types that are
a valid
Type
of an
OpVariable
Result Type
in the global storage classes.
Decorations
It is invalid to apply more than one of
Noperspective
or
Flat
decorations
to the same object or member.
It is invalid to apply more than one of
Patch
Centroid
, or
Sample
decorations
to the same object or member.
It is invalid to apply more than one of
Block
and
BufferBlock
decorations
to a structure type.
Block
and
BufferBlock
decorations
must not decorate a structure type that is nested at any level inside
another structure type decorated with
Block
or
BufferBlock
The
FPRoundingMode
decoration
must be applied only to a width-only conversion instruction whose only
uses are
Object
operands of
OpStore
instructions storing through a pointer to a 16-bit
floating-point object in the
StorageBuffer
PhysicalStorageBuffer
Uniform
, or
Output
Storage Classes
All
used for
Scope
and
Memory Semantics
must be of an
OpConstant
Atomic access rules
The pointers taken by atomic operation instructions are further restricted to not point into the
Function
storage class
2.16.3. Validation Rules for Kernel
Capabilities
The
Signedness
in
OpTypeInt
must always be 0.
2.17. Universal Limits
These quantities are minimum limits for all implementations and validators.
Implementations are allowed to support larger quantities.
Client APIs may impose larger minimums. See
Language Capabilities
Validators inform when these limits (or explicitly parameterized limits) are crossed.
Table 3. Limits
Limited Entity
Minimum Limit
Decimal
Hexadecimal
Characters in a
literal
string
65,535
FFFF
Result
bound
See
Physical Layout
for the shader-specific bound.
4,194,303
3FFFFF
Control-flow nesting depth
Measured per function, in program order, counting the
maximum number of
OpBranch
OpBranchConditional
or
OpSwitch
that are seen without yet seeing their
corresponding
Merge Block
, as declared by
OpSelectionMerge
or
OpLoopMerge
1023
3FF
Global variables (
Storage Class
other than
Function
65,535
FFFF
Local variables (
Function
Storage Class
524,287
7FFFF
Decorations per target
Number of entries in the
Decoration
table.
Execution modes per entry point
255
FF
Indexes for
OpAccessChain
OpInBoundsAccessChain
OpPtrAccessChain
OpInBoundsPtrAccessChain
OpCompositeExtract
, and
OpCompositeInsert
255
FF
Number of function parameters, per function declaration
255
FF
OpFunctionCall
actual arguments
255
FF
OpExtInst
actual arguments
255
FF
OpSwitch
(literal, label) pairs
16,383
3FFF
OpTypeStruct
members
16,383
3FFF
Structure nesting depth
255
FF
2.18. Memory Model
A memory model is chosen using a single
OpMemoryModel
instruction near the beginning of the module. This selects both an addressing model and a memory model.
The
Logical
addressing model
means pointers are abstract, having no physical size or numeric value.
In this mode, pointers must be created only from existing objects, and they must not be stored into an object,
unless additional
capabilities
, e.g.,
VariablePointers
, are declared to add such functionality.
The non-
Logical
addressing models
allow physical pointers to be formed.
OpVariable
can be used to create objects that hold pointers.
These are declared for a specific
Storage Class
Pointers for one Storage Class must not be used to access objects in another Storage Class. However, they can be converted with conversion opcodes.
Any particular addressing model describes the bit width of pointers for each of the storage classes.
2.18.1. Memory Layout
Offset
MatrixStride
, and
ArrayStride
Decorations
partially define how a memory buffer is laid out.
In addition, the following also define layout of a memory buffer, applied recursively as needed:
a vector consumes contiguous memory with lower-numbered components appearing in smaller offsets than higher-numbered components,
and with component 0 starting at the vector’s
Offset
Decoration
, if present
in an array, lower-numbered elements appear at smaller offsets than higher-numbered elements, with element 0 starting at the
Offset
Decoration
for the array, if present
in a matrix, lower-numbered columns appear at smaller offsets than higher-numbered columns,
and lower-numbered components within the matrix’s vectors appearing at smaller offsets than high-numbered components,
with component 0 of column 0 starting at the
Offset
Decoration
, if present
(the
RowMajor
and
ColMajor
Decorations
dictate what is contiguous)
2.18.2. Aliasing
Two
memory object declarations
are said to
alias
if they can be accessed (in bounds)
such that both accesses address the same memory locations during their intersecting dynamic lifetimes.
If two memory operations access the same locations, and at least one of them performs a write,
the memory consistency model specified by the client API defines the results
based on the ordering of the accesses.
How aliasing is managed depends on the
memory model
The
Simple
GLSL
, and
Vulkan
memory models can assume that aliasing is generally not present between
the
memory object declarations
Specifically, the consumer is free to assume aliasing is not present between memory object declarations,
unless the memory object declarations explicitly indicate they alias.
Aliasing is indicated by applying the
Aliased
decoration
to a memory object declaration’s
for
OpVariable
and
OpFunctionParameter
Applying
Restrict
is allowed, but has no effect.
For variables holding
PhysicalStorageBuffer
pointers, applying the
AliasedPointer
decoration on the
OpVariable
indicates that the
PhysicalStorageBuffer
pointers are potentially aliased.
Applying
RestrictPointer
is allowed, but has no effect.
Only those
memory object declarations
decorated with
Aliased
or
AliasedPointer
may alias each other.
The
OpenCL
memory model assumes that
memory object declarations
might alias each other.
An implementation may assume that memory object declarations decorated with
Restrict
will not alias any other memory object declaration.
Applying
Aliased
is allowed, but has no effect.
The
Aliased
decoration can be used to express that certain
memory object declarations
may alias.
Referencing the following table, a memory object declaration
may alias another declared pointer
if within a single row:
is an instruction with opcode and storage class from the first pair of columns, and
is an instruction with opcode and storage class from the second pair of columns.
First Storage Class
First Instruction(s)
Second Instructions
Second Storage Classes
CrossWorkgroup
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
CrossWorkgroup
Generic
Function
OpFunctionParameter
OpFunctionParameter
OpVariable
Function
Generic
Function
OpVariable
OpFunctionParameter
Function
Generic
Generic
OpFunctionParameter
OpFunctionParameter
OpVariable
CrossWorkgroup
Function
Generic
Workgroup
Image
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
Image
StorageBuffer
PhysicalStorageBuffer
Uniform
UniformConstant
Output
OpFunctionParameter
OpFunctionParameter
OpVariable
Output
Private
OpFunctionParameter
OpFunctionParameter
OpVariable
Private
StorageBuffer
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
Image
StorageBuffer
PhysicalStorageBuffer
Uniform
UniformConstant
PhysicalStorageBuffer
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
Image
StorageBuffer
PhysicalStorageBuffer
Uniform
UniformConstant
Uniform
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
Image
StorageBuffer
PhysicalStorageBuffer
Uniform
UniformConstant
UniformConstant
OpFunctionParameter
OpVariable
OpFunctionParameter
OpVariable
Image
StorageBuffer
PhysicalStorageBuffer
Uniform
UniformConstant
Workgroup
OpFunctionParameter
OpFunctionParameter
OpVariable
Workgroup
Generic
Workgroup
OpVariable
OpFunctionParameter
Workgroup
Generic
In addition to the above table,
memory object declarations
in the
CrossWorkgroup
Function
Input
Output
Private
, or
Workgroup
storage classes must also have matching pointee types
for aliasing to be present. In all other cases the decoration is ignored.
Because aliasing, as described above, only applies to
memory object declarations
a consumer does not make any assumptions about whether or not memory regions of non memory object declarations overlap.
As such, a consumer needs to perform dependency analysis on non memory object declarations if it wishes to reorder
instructions affecting memory.
The memory locations associated with an
OpFunctionParameter
memory object
declaration are dependent on the dynamic execution of the associated function.
A dynamic instance of an
OpFunctionParameter
memory
object declaration
can be traced to either an
OpVariable
or an entry point
OpFunctionParameter
During the execution of an entry point, behavior is undefined if operations on
two distinct memory object declarations dynamically access the same memory
locations during an intersection of the lifetimes of those two objects, with at
least one of them performing a write, and at least one of the memory object
declarations does not have the
Aliased
decoration (or is assumed to alias via
the memory model).
For the
PhysicalStorageBuffer
storage class
OpVariable
is understood to mean
the
PhysicalStorageBuffer
pointer value(s) stored in the variable.
An
Aliased
PhysicalStorageBuffer
pointer stored in a
Function
variable can alias with other
variables in the same function, global variables, or function parameters.
It is invalid to apply both
Restrict
and
Aliased
to the same
It is invalid to apply both
RestrictPointer
and
AliasedPointer
to the same
2.18.3. Null pointers
A "null pointer" can be formed from an
OpConstantNull
instruction with a pointer result type.
The resulting pointer value is abstract, and will not equal the pointer value formed from any
declared object or access chain into a declared object.
Behavior is undefined if a load or store through
OpConstantNull
is executed.
2.19. Derivatives
Derivatives appear only in the
Fragment
Execution Model
. They are either implicit or explicit.
Some
image instructions
consume implicit derivatives, while the
derivative instructions
compute explicit derivatives.
In all cases, derivatives are well defined when the
derivative group
has
uniform control flow
otherwise see the client API specification for what behavior is allowed.
2.20. Code Motion
Texturing instructions in the Fragment
Execution Model
that rely on an implicit derivative
won’t be moved into control flow that is
not known to be
uniform control flow
within each
derivative group
2.21. Deprecation
A feature may be marked as deprecated by a version of the specification or extension to the specification.
Features marked as deprecated in one version of the specification are still present in that version,
but future versions may reduce their support or completely remove them.
Deprecating before removing allows applications time to transition away from the deprecated feature.
Once the feature is removed,
all tokens used exclusively by that feature will be reserved and any use of those tokens will become invalid.
2.22. Unified Specification
This document specifies all versions of
SPIR-V
There are three kinds of entries in the tables of enumerated tokens:
Reservation:
These say
Reserved
in the enabling capabilities.
They often contain token names only, lacking a semantic description.
They are invalid
SPIR-V
for any version, serving only to reserve the tokens.
They may identify enabling capabilities and extensions, in which case any listed extensions might add the tokens.
See the listed extensions for additional information.
Conditional:
These say
Missing before
or
Missing after
in the enabling capabilities.
They are invalid
SPIR-V
for the missing versions.
They may identify enabling capabilities and extensions, in which case any listed extensions might add the tokens
for some of the missing versions.
See the listed extensions for additional information.
For versions not identified as missing, the tokens are valid
SPIR-V
, subject to any listed enabling capabilities.
Universal:
These have no mention of what version they are missing in, or of being reserved.
They are valid in all versions of
SPIR-V
2.23. Uniformity
SPIR-V has multiple notions of uniformity of values.
Result
decorated
as
Uniform
(for a particular scope) is a contract that
all invocations within that scope compute the same value for that result,
for a given dynamic instance of an instruction.
This is useful to enable implementations to store results in a scalar register file (
scalarization
), for example.
Results are assumed not to be uniform unless decorated as such.
An
is defined to be
dynamically uniform
for a dynamic instance of an instruction if all invocations
(in an invocation group) that execute the dynamic instance have the same value for that
This is not something that is explicitly decorated, it is just a property that arises.
This property is assumed to hold for operands of certain instructions, such as the
Image
operand of image instructions,
unless that operand is decorated as
NonUniform
Some implementations require more complex instruction expansions to handle non-dynamically uniform values in certain
instructions, and thus it is mandatory for certain operands to be decorated as
NonUniform
if they are not
guaranteed to be dynamically uniform.
While the names may suggest otherwise, nothing forbids an
from being decorated as both
Uniform
and
NonUniform
Because
dynamically uniform
is at a larger scope (invocation group) than the default
Uniform
scope (subgroup),
it is even possible for the
to be uniform at the subgroup scope but not dynamically uniform.
3. Binary Form
This section contains the exact form for all instructions, starting with the numerical values for all fields. See
Physical Layout
for the order words appear in.
3.1. Magic Number
Magic number for a SPIR-V module.
Tip
Endianness:
A module is defined as a stream of words, not a stream of bytes. However, if stored as a stream of bytes (e.g., in a file), the magic number can be used to deduce what endianness to apply to convert the byte stream back to a word stream.
Magic Number
0x07230203
3.2. Enumerants
3.2.1. Source Language
The source language is for debug purposes only, with no semantics that affect the meaning of other parts of the module.
Used by
OpSource
Source Language
Enabling Capabilities
Unknown
ESSL
GLSL
OpenCL_C
OpenCL_CPP
HLSL
CPP_for_OpenCL
SYCL
HERO_C
NZSL
10
WGSL
11
Slang
12
Zig
13
Rust
3.2.2. Execution Model
Used by
OpEntryPoint
and
OpConditionalEntryPointINTEL
Execution Model
Enabling Capabilities
Vertex
Vertex shading stage.
Shader
TessellationControl
Tessellation control (or hull) shading stage.
Tessellation
TessellationEvaluation
Tessellation evaluation (or domain) shading stage.
Tessellation
Geometry
Geometry shading stage.
Geometry
Fragment
Fragment shading stage.
Shader
GLCompute
Graphical compute shading stage.
Shader
Kernel
Compute kernel.
Kernel
5267
TaskNV
MeshShadingNV
Reserved
5268
MeshNV
MeshShadingNV
Reserved
5313
RayGenerationKHR (RayGenerationNV)
RayTracingNV
RayTracingKHR
Reserved
5314
IntersectionKHR (IntersectionNV)
RayTracingNV
RayTracingKHR
Reserved
5315
AnyHitKHR (AnyHitNV)
RayTracingNV
RayTracingKHR
Reserved
5316
ClosestHitKHR (ClosestHitNV)
RayTracingNV
RayTracingKHR
Reserved
5317
MissKHR (MissNV)
RayTracingNV
RayTracingKHR
Reserved
5318
CallableKHR (CallableNV)
RayTracingNV
RayTracingKHR
Reserved
5364
TaskEXT
MeshShadingEXT
Reserved
5365
MeshEXT
MeshShadingEXT
Reserved
3.2.3. Addressing Model
Used by
OpMemoryModel
Addressing Model
Enabling Capabilities
Logical
Physical32
Indicates a 32-bit module, where the address width is equal to 32 bits.
Addresses
Physical64
Indicates a 64-bit module, where the address width is equal to 64 bits.
Addresses
5348
PhysicalStorageBuffer64 (PhysicalStorageBuffer64EXT)
Indicates that pointers with a
storage class
of
PhysicalStorageBuffer
are physical pointer types with an address width of 64 bits, while pointers to all other storage classes are logical.
PhysicalStorageBufferAddresses
Missing before
version 1.5
Also see extensions:
SPV_EXT_physical_storage_buffer
SPV_KHR_physical_storage_buffer
3.2.4. Memory Model
Used by
OpMemoryModel
Memory Model
Enabling Capabilities
Simple
Deprecated
(use
GLSL450
).
Memory model is undefined.
Shader
GLSL450
Memory model needed by later versions of GLSL and ESSL. Works across multiple versions.
Shader
OpenCL
OpenCL memory model.
Kernel
Vulkan (VulkanKHR)
Vulkan memory model
, as specified by the client API. This memory model must be declared if and only if the
VulkanMemoryModel
capability
is declared.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
3.2.5. Execution Mode
Declare the modes an
entry point
executes in. All
Extra Operands
that are
must be the
of
constant instructions
unless otherwise stated. It is invalid to apply the same execution mode more than once to any entry point unless explicitly allowed below for a specific execution mode.
Used by
OpExecutionMode
and
OpExecutionModeId
Execution Mode
Extra Operands
Enabling Capabilities
Invocations
Number of invocations
is an unsigned 32-bit integer number of times to invoke the geometry stage for each input primitive received. The default is to run once for each input primitive. It is invalid to specify a value greater than the target-dependent maximum. Only valid with the
Geometry
Execution Model
Literal
Number of
invocations
Geometry
SpacingEqual
Requests the tessellation primitive generator to divide edges into a collection of equal-sized segments. Only valid with one of the tessellation
Execution Models
Tessellation
SpacingFractionalEven
Requests the tessellation primitive generator to divide edges into an even number of equal-length segments plus two additional shorter fractional segments. Only valid with one of the tessellation
Execution Models
Tessellation
SpacingFractionalOdd
Requests the tessellation primitive generator to divide edges into an odd number of equal-length segments plus two additional shorter fractional segments. Only valid with one of the tessellation
Execution Models
Tessellation
VertexOrderCw
Requests the tessellation primitive generator to generate triangles in clockwise order. Only valid with one of the tessellation
Execution Models
Tessellation
VertexOrderCcw
Requests the tessellation primitive generator to generate triangles in counter-clockwise order. Only valid with one of the tessellation
Execution Models
Tessellation
PixelCenterInteger
Pixels appear centered on whole-number pixel offsets. E.g., the coordinate (0.5, 0.5) appears to move to (0.0, 0.0). Only valid with the
Fragment
Execution Model
. If a
Fragment
entry point does not have this set, pixels appear centered at offsets of (0.5, 0.5) from whole numbers
Shader
OriginUpperLeft
The coordinates decorated by
FragCoord
appear to originate in the upper left, and increase toward the right and downward. Only valid with the
Fragment
Execution Model
Shader
OriginLowerLeft
The coordinates decorated by
FragCoord
appear to originate in the lower left, and increase toward the right and upward. Only valid with the
Fragment
Execution Model
Shader
EarlyFragmentTests
Fragment tests are to be performed before fragment shader execution. Only valid with the
Fragment
Execution Model
Shader
10
PointMode
Requests the tessellation primitive generator to generate a point for each distinct vertex in the subdivided primitive, rather than to generate lines or triangles. Only valid with one of the tessellation
Execution Models
Tessellation
11
Xfb
This stage runs in transform feedback-capturing mode and this module is responsible for describing the transform-feedback setup. See the
XfbBuffer
Offset
, and
XfbStride
Decorations
TransformFeedback
12
DepthReplacing
This mode declares that this entry point dynamically writes the
FragDepth
-decorated variable.
Behavior is undefined
if this mode is declared and an invocation does not write to
FragDepth
, or vice versa. Only valid with the
Fragment
Execution Model
Shader
14
DepthGreater
Indicates that per-fragment tests may assume that any
FragDepth
built in
-decorated value written by the shader is greater-than-or-equal to the fragment’s interpolated depth value (given by the
component of the
FragCoord
built in
-decorated variable). Other stages of the pipeline use the written value as normal. Only valid with the
Fragment
execution model
Shader
15
DepthLess
Indicates that per-fragment tests may assume that any
FragDepth
built in
-decorated value written by the shader is less-than-or-equal to the fragment’s interpolated depth value (given by the
component of the
FragCoord
built in
-decorated variable). Other stages of the pipeline use the written value as normal. Only valid with the
Fragment
execution model
Shader
16
DepthUnchanged
Indicates that per-fragment tests may assume that any
FragDepth
built in
-decorated value written by the shader is the same as the fragment’s interpolated depth value (given by the
component of the
FragCoord
built in
-decorated variable). Other stages of the pipeline use the written value as normal. Only valid with the
Fragment
execution model
Shader
17
LocalSize
Indicates the workgroup size in the
, and
dimensions.
x size
y size
, and
z size
are unsigned 32-bit integers. Only valid with the
GLCompute
or
Kernel
Execution Models
Literal
x size
Literal
y size
Literal
z size
18
LocalSizeHint
A hint to the compiler, which indicates the most likely to be used workgroup size in the
, and
dimensions.
x size
y size
, and
z size
are unsigned 32-bit integers. Only valid with the
Kernel
Execution Model
Literal
x size
Literal
y size
Literal
z size
Kernel
19
InputPoints
Stage input primitive is
points
. Only valid with the
Geometry
Execution Model
Geometry
20
InputLines
Stage input primitive is
lines
. Only valid with the
Geometry
Execution Model
Geometry
21
InputLinesAdjacency
Stage input primitive is
lines adjacency
. Only valid with the
Geometry
Execution Model
Geometry
22
Triangles
For a geometry stage, input primitive is
triangles
. For a tessellation stage, requests the tessellation primitive generator to generate triangles. Only valid with the
Geometry
or one of the tessellation
Execution Models
Geometry
Tessellation
23
InputTrianglesAdjacency
Geometry stage input primitive is
triangles adjacency
. Only valid with the
Geometry
Execution Model
Geometry
24
Quads
Requests the tessellation primitive generator to generate
quads
. Only valid with one of the tessellation
Execution Models
Tessellation
25
Isolines
Requests the tessellation primitive generator to generate
isolines
. Only valid with one of the tessellation
Execution Models
Tessellation
26
OutputVertices
Vertex Count
is an unsigned 32-bit integer. For a geometry stage, it is the maximum number of vertices the shader will ever emit in a single
invocation
. For a tessellation-control stage, it is the number of vertices in the output patch produced by the tessellation control shader, which also specifies the number of times the tessellation control shader is invoked. Only valid with the
Geometry
or one of the tessellation
Execution Models
Literal
Vertex count
Geometry
Tessellation
MeshShadingNV
MeshShadingEXT
27
OutputPoints
Stage output primitive is
points
. Only valid with the
Geometry
Execution Model
Geometry
MeshShadingNV
MeshShadingEXT
28
OutputLineStrip
Stage output primitive is
line strip
. Only valid with the
Geometry
Execution Model
Geometry
29
OutputTriangleStrip
Stage output primitive is
triangle strip
. Only valid with the
Geometry
Execution Model
Geometry
30
VecTypeHint
A hint to the compiler, which indicates that most operations used in the entry point are explicitly vectorized using a particular vector type. The 16 high-order bits of the
Vector Type
operand specify the
number of components
of the vector. The 16 low-order bits of the
Vector Type
operand specify the
data type
of the vector.
These are the legal
data type
values:
represents an 8-bit integer value.
represents a 16-bit integer value.
represents a 32-bit integer value.
represents a 64-bit integer value.
represents a 16-bit IEEE 754 float value.
represents a 32-bit IEEE 754 float value.
represents a 64-bit IEEE 754 float value.
Only valid with the
Kernel
Execution Model
Literal
Vector type
Kernel
31
ContractionOff
Indicates that floating-point-expressions contraction is disallowed. Only valid with the
Kernel
Execution Model
Kernel
33
Initializer
Indicates that this entry point is a module initializer.
Kernel
Missing before
version 1.1
34
Finalizer
Indicates that this entry point is a module finalizer.
Kernel
Missing before
version 1.1
35
SubgroupSize
Indicates that this entry point requires the specified
Subgroup Size
Subgroup Size
is an unsigned 32-bit integer.
Literal
Subgroup Size
SubgroupDispatch
Missing before
version 1.1
36
SubgroupsPerWorkgroup
Indicates that this entry point requires the specified number of
Subgroups Per Workgroup
Subgroups Per Workgroup
is an unsigned 32-bit integer.
Literal
Subgroups Per Workgroup
SubgroupDispatch
Missing before
version 1.1
37
SubgroupsPerWorkgroupId
Same as the
SubgroupsPerWorkgroup
mode
, but using an
operand instead of a literal. The operand is consumed as unsigned and must be an
integer type
scalar.
Subgroups Per Workgroup
SubgroupDispatch
Missing before
version 1.2
38
LocalSizeId
Same as the
LocalSize
Mode
, but using
operands instead of literals. The operands are consumed as unsigned and each must be an
integer type
scalar.
x size
y size
z size
Missing before
version 1.2
39
LocalSizeHintId
Same as the
LocalSizeHint
Mode
, but using
operands instead of literals. The operands are consumed as unsigned and each must be an
integer type
scalar.
x size hint
y size hint
z size hint
Kernel
Missing before
version 1.2
4169
NonCoherentColorAttachmentReadEXT
TileImageColorReadAccessEXT
Reserved
4170
NonCoherentDepthAttachmentReadEXT
TileImageDepthReadAccessEXT
Reserved
4171
NonCoherentStencilAttachmentReadEXT
TileImageStencilReadAccessEXT
Reserved
4421
SubgroupUniformControlFlowKHR
Shader
Reserved
Also see extension:
SPV_KHR_subgroup_uniform_control_flow
4446
PostDepthCoverage
SampleMaskPostDepthCoverage
Reserved
Also see extension:
SPV_KHR_post_depth_coverage
4459
DenormPreserve
Any denormalized value input into a shader or potentially generated by any instruction in a shader is preserved. Denormalized values obtained via unpacking an integer into a vector of values with smaller bit width and interpreting those values as floating-point numbers is preserved.
Only affects instructions operating on a floating-point type using the IEEE 754 encoding whose component width is
Target Width
Target Width
is an unsigned 32-bit integer. May be applied at most once per
Target Width
to any entry point.
Literal
Target Width
DenormPreserve
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4460
DenormFlushToZero
Any denormalized value input into a shader or potentially generated by any instruction in a shader is flushed to zero. Denormalized values obtained via unpacking an integer into a vector of values with smaller bit width and interpreting those values as floating-point numbers is flushed to zero.
Only affects instructions operating on a floating-point type using the IEEE 754 encoding whose component width is
Target Width
Target Width
is an unsigned 32-bit integer. May be applied at most once per
Target Width
to any entry point.
Literal
Target Width
DenormFlushToZero
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4461
SignedZeroInfNanPreserve
The implementation does not perform optimizations on floating-point instructions that do not preserve sign of a zero, or assume that operands and results are not NaNs or infinities. Bit patterns for NaNs might not be preserved.
Only affects instructions operating on a floating-point type using the IEEE 754 encoding whose component width is
Target Width
Target Width
is an unsigned 32-bit integer. May be applied at most once per
Target Width
to any entry point.
Literal
Target Width
SignedZeroInfNanPreserve
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4462
RoundingModeRTE
The default rounding mode for floating-point arithmetic and conversions instructions is round to nearest even. If an instruction is decorated with
FPRoundingMode
or defines a rounding mode in its description, that rounding mode is applied and
RoundingModeRTE
is ignored.
Only affects instructions operating on a floating-point type using the IEEE 754 encoding whose component width is
Target Width
Target Width
is an unsigned 32-bit integer. May be applied at most once per
Target Width
to any entry point.
Literal
Target Width
RoundingModeRTE
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4463
RoundingModeRTZ
The default rounding mode for floating-point arithmetic and conversions instructions is round toward zero. If an instruction is decorated with
FPRoundingMode
or defines a rounding mode in its description, that rounding mode is applied and
RoundingModeRTZ
is ignored.
Only affects instructions operating on a floating-point type using the IEEE 754 encoding whose component width is
Target Width
Target Width
is an unsigned 32-bit integer. May be applied at most once per
Target Width
to any entry point.
Literal
Target Width
RoundingModeRTZ
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4489
NonCoherentTileAttachmentReadQCOM
TileShadingQCOM
Reserved
4490
TileShadingRateQCOM
Literal
x rate
Literal
y rate
Literal
z rate
TileShadingQCOM
Reserved
5017
EarlyAndLateFragmentTestsAMD
Shader
Reserved
Also see extension:
SPV_AMD_shader_early_and_late_fragment_tests
5027
StencilRefReplacingEXT
StencilExportEXT
Reserved
Also see extension:
SPV_EXT_shader_stencil_export
5069
CoalescingAMDX
ShaderEnqueueAMDX
Reserved
5070
IsApiEntryAMDX
Is Entry
ShaderEnqueueAMDX
Reserved
5071
MaxNodeRecursionAMDX
Number of recursions
ShaderEnqueueAMDX
Reserved
5072
StaticNumWorkgroupsAMDX
x size
y size
z size
ShaderEnqueueAMDX
Reserved
5073
ShaderIndexAMDX
Shader Index
ShaderEnqueueAMDX
Reserved
5077
MaxNumWorkgroupsAMDX
x size
y size
z size
ShaderEnqueueAMDX
Reserved
5079
StencilRefUnchangedFrontAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5080
StencilRefGreaterFrontAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5081
StencilRefLessFrontAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5082
StencilRefUnchangedBackAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5083
StencilRefGreaterBackAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5084
StencilRefLessBackAMD
StencilExportEXT
Reserved
Also see extensions:
SPV_AMD_shader_early_and_late_fragment_tests
SPV_EXT_shader_stencil_export
5088
QuadDerivativesKHR
QuadControlKHR
Reserved
5089
RequireFullQuadsKHR
QuadControlKHR
Reserved
5102
SharesInputWithAMDX
Node Name
Shader Index
ShaderEnqueueAMDX
Reserved
5269
OutputLinesEXT (OutputLinesNV)
MeshShadingNV
MeshShadingEXT
Reserved
Also see extensions:
SPV_NV_mesh_shader
SPV_EXT_mesh_shader
5270
OutputPrimitivesEXT (OutputPrimitivesNV)
Literal
Primitive count
MeshShadingNV
MeshShadingEXT
Reserved
Also see extensions:
SPV_NV_mesh_shader
SPV_EXT_mesh_shader
5289
DerivativeGroupQuadsKHR (DerivativeGroupQuadsNV)
ComputeDerivativeGroupQuadsKHR
Reserved
Also see extensions:
SPV_NV_compute_shader_derivatives
SPV_KHR_compute_shader_derivatives
5290
DerivativeGroupLinearKHR (DerivativeGroupLinearNV)
ComputeDerivativeGroupLinearKHR
Reserved
Also see extensions:
SPV_NV_compute_shader_derivatives
SPV_KHR_compute_shader_derivatives
5298
OutputTrianglesEXT (OutputTrianglesNV)
MeshShadingNV
MeshShadingEXT
Reserved
Also see extensions:
SPV_NV_mesh_shader
SPV_EXT_mesh_shader
5366
PixelInterlockOrderedEXT
FragmentShaderPixelInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5367
PixelInterlockUnorderedEXT
FragmentShaderPixelInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5368
SampleInterlockOrderedEXT
FragmentShaderSampleInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5369
SampleInterlockUnorderedEXT
FragmentShaderSampleInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5370
ShadingRateInterlockOrderedEXT
FragmentShaderShadingRateInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5371
ShadingRateInterlockUnorderedEXT
FragmentShaderShadingRateInterlockEXT
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5427
Shader64BitIndexingEXT
Shader64BitIndexingEXT
Reserved
5618
SharedLocalMemorySizeINTEL
Literal
Size
VectorComputeINTEL
Reserved
5620
RoundingModeRTPINTEL
Literal
Target Width
RoundToInfinityINTEL
Reserved
5621
RoundingModeRTNINTEL
Literal
Target Width
RoundToInfinityINTEL
Reserved
5622
FloatingPointModeALTINTEL
Literal
Target Width
RoundToInfinityINTEL
Reserved
5623
FloatingPointModeIEEEINTEL
Literal
Target Width
RoundToInfinityINTEL
Reserved
5893
MaxWorkgroupSizeINTEL
Literal
max_x_size
Literal
max_y_size
Literal
max_z_size
KernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5894
MaxWorkDimINTEL
Literal
max_dimensions
KernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5895
NoGlobalOffsetINTEL
KernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5896
NumSIMDWorkitemsINTEL
Literal
vector_width
FPGAKernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5903
SchedulerTargetFmaxMhzINTEL
Literal
target_fmax
FPGAKernelAttributesINTEL
Reserved
6023
MaximallyReconvergesKHR
Shader
Reserved
Also see extension:
SPV_KHR_maximal_reconvergence
6028
FPFastMathDefault
Target Type
Fast-Math Mode
FloatControls2
Reserved
6154
StreamingInterfaceINTEL
Literal
StallFreeReturn
FPGAKernelAttributesINTEL
Reserved
6160
RegisterMapInterfaceINTEL
Literal
WaitForDoneWrite
FPGAKernelAttributesv2INTEL
Reserved
6417
NamedBarrierCountINTEL
Literal
Barrier Count
VectorComputeINTEL
Reserved
6461
MaximumRegistersINTEL
Literal
Number of Registers
RegisterLimitsINTEL
Reserved
6462
MaximumRegistersIdINTEL
Number of Registers
RegisterLimitsINTEL
Reserved
6463
NamedMaximumRegistersINTEL
Named Maximum Number of Registers
Named Maximum Number of Registers
RegisterLimitsINTEL
Reserved
3.2.6. Storage Class
Class of storage for declared variables.
Intermediate values
do not form a storage class, and unless stated otherwise, storage class-based restrictions are not restrictions on intermediate objects and their types.
Used by:
OpTypePointer
OpTypeForwardPointer
OpVariable
OpGenericCastToPtrExplicit
OpTypeUntypedPointerKHR
OpUntypedVariableKHR
OpTypeBufferEXT
Storage Class
Enabling Capabilities
UniformConstant
Shared externally, visible across all
invocations
. Graphics uniform memory. OpenCL constant memory. Variables declared with this storage class are read-only. They may have initializers, as allowed by the client API.
Input
Input from pipeline. Visible only by the current
invocation
. Variables declared with this storage class are read-only, and must not have initializers.
Uniform
Shared externally, visible across all
invocations
Composite
objects in this storage class must have a type with an
explicit layout
Shader
Output
Output to pipeline. Visible only by the current
invocation
Shader
Workgroup
Visible across all
invocations
within a workgroup.
CrossWorkgroup
Visible across all
invocations
Private
Visible only by the current
invocation
Shader
VectorComputeINTEL
Function
Visible only by the current
invocation
. For memory allocation within a function with specific lifetime. See
OpVariable
for more information.
Generic
For generic pointers, which overload the
Function
Workgroup
, and
CrossWorkgroup
Storage Classes
GenericPointer
PushConstant
For holding push-constant memory, visible across all
invocations
. Intended to contain a small bank of values pushed from the client API. Variables declared with this storage class are read-only, and must not have initializers.
Composite
objects in this storage class must have a type with an
explicit layout
Shader
10
AtomicCounter
For holding atomic counters. Visible only by the current
invocation
AtomicStorage
11
Image
For holding
image
memory.
12
StorageBuffer
Shared externally, readable and writable, visible across all
invocations
Composite
objects in this storage class must have a type with an
explicit layout
Shader
Missing before
version 1.3
Also see extensions:
SPV_KHR_storage_buffer_storage_class
SPV_KHR_variable_pointers
4172
TileImageEXT
TileImageColorReadAccessEXT
Reserved
4491
TileAttachmentQCOM
TileShadingQCOM
Reserved
5068
NodePayloadAMDX
ShaderEnqueueAMDX
Reserved
5328
CallableDataKHR (CallableDataNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5329
IncomingCallableDataKHR (IncomingCallableDataNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5338
RayPayloadKHR (RayPayloadNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5339
HitAttributeKHR (HitAttributeNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5342
IncomingRayPayloadKHR (IncomingRayPayloadNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5343
ShaderRecordBufferKHR (ShaderRecordBufferNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5349
PhysicalStorageBuffer (PhysicalStorageBufferEXT)
Shared externally, readable and writable, visible across all
invocations
. Uses physical addressing.
Composite
objects in this storage class must have a type with an
explicit layout
PhysicalStorageBufferAddresses
Missing before
version 1.5
Also see extensions:
SPV_EXT_physical_storage_buffer
SPV_KHR_physical_storage_buffer
5385
HitObjectAttributeNV
ShaderInvocationReorderNV
Reserved
5402
TaskPayloadWorkgroupEXT
MeshShadingEXT
Missing before
version 1.4
Also see extension:
SPV_EXT_mesh_shader
5411
HitObjectAttributeEXT
ShaderInvocationReorderEXT
Reserved
5605
CodeSectionINTEL
FunctionPointersINTEL
Reserved
Also see extension:
SPV_INTEL_function_pointers
5936
DeviceOnlyALTERA (DeviceOnlyINTEL)
USMStorageClassesALTERA
Reserved
5937
HostOnlyALTERA (HostOnlyINTEL)
USMStorageClassesALTERA
Reserved
3.2.7. Dim
Dimensionality of an image. Some uses require capabilities beyond the enabling capabilities, for example where the type’s
Sampled
operand is 2, or
Arrayed
operand is 1. See the
capabilities
section for more detail.
Used by
OpTypeImage
Dim
Enabling Capabilities
1D
Sampled1D
2D
3D
Cube
Shader
Rect
SampledRect
Buffer
SampledBuffer
SubpassData
InputAttachment
4173
TileImageDataEXT
TileImageColorReadAccessEXT
Reserved
3.2.8. Sampler Addressing Mode
Addressing mode for creating constant samplers.
Used by
OpConstantSampler
Sampler Addressing Mode
Enabling Capabilities
None
The image coordinates used to sample elements of the image refer to a location inside the image, otherwise the results are
poison
ClampToEdge
Out-of-range image coordinates are clamped to the extent.
Clamp
Out-of-range image coordinates result in a border color.
Repeat
Out-of-range image coordinates are wrapped to the valid range. Must only be used with normalized coordinates.
RepeatMirrored
Flip the image coordinate at every integer junction. Must only be used with normalized coordinates.
3.2.9. Sampler Filter Mode
Filter mode for creating constant samplers.
Used by
OpConstantSampler
Sampler Filter Mode
Enabling Capabilities
Nearest
Use filter nearest mode when performing a read image operation.
Linear
Use filter linear mode when performing a read image operation.
3.2.10. Image Format
Declarative image format.
Used by
OpTypeImage
Image Format
Enabling Capabilities
Unknown
Rgba32f
Shader
Rgba16f
Shader
R32f
Shader
Rgba8
Shader
Rgba8Snorm
Shader
Rg32f
StorageImageExtendedFormats
Rg16f
StorageImageExtendedFormats
R11fG11fB10f
StorageImageExtendedFormats
R16f
StorageImageExtendedFormats
10
Rgba16
StorageImageExtendedFormats
11
Rgb10A2
StorageImageExtendedFormats
12
Rg16
StorageImageExtendedFormats
13
Rg8
StorageImageExtendedFormats
14
R16
StorageImageExtendedFormats
15
R8
StorageImageExtendedFormats
16
Rgba16Snorm
StorageImageExtendedFormats
17
Rg16Snorm
StorageImageExtendedFormats
18
Rg8Snorm
StorageImageExtendedFormats
19
R16Snorm
StorageImageExtendedFormats
20
R8Snorm
StorageImageExtendedFormats
21
Rgba32i
Shader
22
Rgba16i
Shader
23
Rgba8i
Shader
24
R32i
Shader
25
Rg32i
StorageImageExtendedFormats
26
Rg16i
StorageImageExtendedFormats
27
Rg8i
StorageImageExtendedFormats
28
R16i
StorageImageExtendedFormats
29
R8i
StorageImageExtendedFormats
30
Rgba32ui
Shader
31
Rgba16ui
Shader
32
Rgba8ui
Shader
33
R32ui
Shader
34
Rgb10a2ui
StorageImageExtendedFormats
35
Rg32ui
StorageImageExtendedFormats
36
Rg16ui
StorageImageExtendedFormats
37
Rg8ui
StorageImageExtendedFormats
38
R16ui
StorageImageExtendedFormats
39
R8ui
StorageImageExtendedFormats
40
R64ui
Int64ImageEXT
41
R64i
Int64ImageEXT
3.2.11. Image Channel Order
The image channel orders that result from
OpImageQueryOrder
Image Channel Order
Enabling Capabilities
RG
RA
RGB
RGBA
BGRA
ARGB
Intensity
Luminance
10
Rx
11
RGx
12
RGBx
13
Depth
14
DepthStencil
15
sRGB
16
sRGBx
17
sRGBA
18
sBGRA
19
ABGR
3.2.12. Image Channel Data Type
Image channel data types that result from
OpImageQueryFormat
Image Channel Data Type
Enabling Capabilities
SnormInt8
SnormInt16
UnormInt8
UnormInt16
UnormShort565
UnormShort555
UnormInt101010
SignedInt8
SignedInt16
SignedInt32
10
UnsignedInt8
11
UnsignedInt16
12
UnsignedInt32
13
HalfFloat
14
Float
15
UnormInt24
16
UnormInt101010_2
17
UnormInt10X6EXT
19
UnsignedIntRaw10EXT
20
UnsignedIntRaw12EXT
21
UnormInt2_101010EXT
22
UnsignedInt10X6EXT
23
UnsignedInt12X4EXT
24
UnsignedInt14X2EXT
25
UnormInt12X4EXT
26
UnormInt14X2EXT
3.2.13. Image Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Provides additional operands to sampling, or getting texels from, an image. Bits that are set indicate whether an additional operand follows, as described by the table. If there are multiple following operands indicated, they are ordered: Those indicated by smaller-numbered bits appear first. At least one bit must be set (
None
is invalid).
Used by:
OpImageSampleImplicitLod
OpImageSampleExplicitLod
OpImageSampleDrefImplicitLod
OpImageSampleDrefExplicitLod
OpImageSampleProjImplicitLod
OpImageSampleProjExplicitLod
OpImageSampleProjDrefImplicitLod
OpImageSampleProjDrefExplicitLod
OpImageFetch
OpImageGather
OpImageDrefGather
OpImageRead
OpImageWrite
OpImageSparseSampleImplicitLod
OpImageSparseSampleExplicitLod
OpImageSparseSampleDrefImplicitLod
OpImageSparseSampleDrefExplicitLod
OpImageSparseFetch
OpImageSparseGather
OpImageSparseDrefGather
OpImageSparseRead
OpImageSampleFootprintNV
Image Operands
Enabling Capabilities
0x0
None
0x1
Bias
A following operand is the bias added to the implicit level of detail. Only valid with implicit-lod instructions. It must be a 32-bit
floating-point type
scalar using the IEEE 754 encoding. This must only be used with an
OpTypeImage
that has a
Dim
operand of
1D
2D
3D
, or
Cube
, and the
MS
operand must be 0.
Shader
0x2
Lod
A following operand is the explicit level-of-detail to use. Only valid with explicit-lod instructions. For sampling operations, it must be a 32-bit
floating-point type
scalar using the IEEE 754 encoding. For fetch operations, it must be a 32-bit
integer type
scalar. This must only be used with an
OpTypeImage
that has a
Dim
operand of
1D
2D
3D
, or
Cube
, and the
MS
operand must be 0.
0x4
Grad
Two following operands are
dx
followed by
dy
. These are explicit derivatives in the
and
direction to use in computing level of detail. Each is a scalar or vector containing (
du/dx
[,
dv/dx
] [,
dw/dx
]) and (
du/dy
[,
dv/dy
] [,
dw/dy
]). The number of components of each must equal the number of components in
Coordinate
, minus the
array layer
component, if present. Only valid with explicit-lod instructions. They must be a scalar or vector of 32-bits
floating-point type
using the IEEE 754 encoding. This must only be used with an
OpTypeImage
that has an
MS
operand of 0. It is invalid to set both the
Lod
and
Grad
bits.
0x8
ConstOffset
A following operand is added to (
) before texel lookup. It must be an
of a
constant instruction
with a 32-bit scalar or vector
integer type
. It is invalid for these to be outside a target-dependent allowed range. The number of components must equal the number of components in
Coordinate
, minus the
array layer
component, if present. Not valid with the
Cube
dimension
. An instruction must specify at most one of the
ConstOffset
Offset
, and
ConstOffsets
image operands.
0x10
Offset
A following operand is added to (
) before texel lookup. It must be a 32-bit scalar or vector of
integer type
. It is invalid for these to be outside a target-dependent allowed range. The number of components must equal the number of components in
Coordinate
, minus the
array layer
component, if present. Not valid with the
Cube
dimension
. An instruction must specify at most one of the
ConstOffset
Offset
, and
ConstOffsets
image operands.
ImageGatherExtended
0x20
ConstOffsets
A following operand is
Offsets
Offsets
must be an
of a
constant instruction
making an array of size four of vectors of two 32-bits integer components. Each gathered texel is identified by adding one of these array elements to the (
) sampled location. It is invalid for these to be outside a target-dependent allowed range. Only valid with
OpImageGather
or
OpImageDrefGather
. Not valid with the
Cube
dimension
. An instruction must specify at most one of the
ConstOffset
Offset
, and
ConstOffsets
image operands.
ImageGatherExtended
0x40
Sample
A following operand is the sample number of the sample to use. Only valid with
OpImageFetch
OpImageRead
OpImageWrite
OpImageSparseFetch
, and
OpImageSparseRead
. The
Sample
operand must be used if and only if the underlying
OpTypeImage
has
MS
of 1. It must be a 32-bit
integer type
scalar.
0x80
MinLod
A following operand is the minimum level-of-detail to use when accessing the image. Only valid with
Implicit
instructions and
Grad
instructions. It must be a 32-bit
floating-point type
scalar using the IEEE 754 encoding. This must only be used with an
OpTypeImage
that has a
Dim
operand of
1D
2D
3D
, or
Cube
, and the
MS
operand must be 0.
MinLod
0x100
MakeTexelAvailable (MakeTexelAvailableKHR)
Perform an availability operation on the texel locations after the store. A following operand is the memory
scope
that controls the availability operation. Requires
NonPrivateTexel
to also be set. Only valid with
OpImageWrite
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x200
MakeTexelVisible (MakeTexelVisibleKHR)
Perform a visibility operation on the texel locations before the load. A following operand is the memory
scope
that controls the visibility operation. Requires
NonPrivateTexel
to also be set. Only valid with
OpImageRead
and
OpImageSparseRead
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x400
NonPrivateTexel (NonPrivateTexelKHR)
The image access obeys inter-thread ordering, as specified by the client API.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x800
VolatileTexel (VolatileTexelKHR)
This access cannot be eliminated, duplicated, or combined with other accesses.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x1000
SignExtend
The texel value is converted to the target value via sign extension. Only valid if the texel value type is a scalar or vector of
integer type
- for sparse images, the texel value type is the second member of the result type.
- for
OpImageWrite
the texel value type is type of the
Texel
operand.
- otherwise, the texel value type is the result type.
It is invalid to set both the
ZeroExtend
and
SignExtend
bits.
Missing before
version 1.4
0x2000
ZeroExtend
The texel value is converted to the target value via zero extension. Only valid if the texel value type is a scalar or vector of
integer type
with signedness of 0:
- for sparse images, the texel value type is the second member of the result type.
- for
OpImageWrite
the texel value type is type of the
Texel
operand.
- otherwise, the texel value type is the result type.
It is invalid to set both the
ZeroExtend
and
SignExtend
bits.
Missing before
version 1.4
0x4000
Nontemporal
Hints that the accessed texels are not likely to be accessed again in the near future.
Missing before
version 1.6
0x10000
Offsets
3.2.14. FP Fast Math Mode
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Enables fast math operations which are otherwise unsafe.
Only valid on
OpFAdd
OpFSub
OpFMul
OpFDiv
OpFRem
, and
OpFMod
instructions
Missing before
version 1.6
the
OpFNegate
instruction
the
OpOrdered
OpUnordered
OpFOrdEqual
OpFUnordEqual
OpFOrdNotEqual
OpFUnordNotEqual
OpFOrdLessThan
OpFUnordLessThan
OpFOrdGreaterThan
OpFUnordGreaterThan
OpFOrdLessThanEqual
OpFUnordLessThanEqual
OpFOrdGreaterThanEqual
, and
OpFUnordGreaterThanEqual
instructions
OpExtInst
extended instructions, where expressly permitted by the extended instruction set in use.
FP Fast Math Mode
Enabling Capabilities
0x0
None
0x1
NotNaN
Assume parameters and result are not NaN. If this assumption does not hold then the operation returns
poison
0x2
NotInf
Assume parameters and result are not +/- Inf. If this assumption does not hold then the operation returns
poison
0x4
NSZ
Treat the sign of a zero parameter or result as insignificant.
0x8
AllowRecip
Allow the usage of reciprocal rather than perform a division.
0x10
Fast
Allow algebraic transformations according to real-number associative and distributive algebra. This flag implies all the others.
0x10000
AllowContract (AllowContractFastINTEL)
FloatControls2
FPFastMathModeINTEL
Reserved
0x20000
AllowReassoc (AllowReassocINTEL)
FloatControls2
FPFastMathModeINTEL
Reserved
0x40000
AllowTransform
FloatControls2
Reserved
3.2.15. FP Rounding Mode
Associate a rounding mode to a floating-point conversion instruction.
FP Rounding Mode
Enabling Capabilities
RTE
Round to nearest even.
RTZ
Round towards zero.
RTP
Round towards positive infinity.
RTN
Round towards negative infinity.
3.2.16. Linkage Type
Associate a linkage type to functions or global variables. See
linkage
Linkage Type
Enabling Capabilities
Export
Accessible by other modules as well.
Linkage
Import
A declaration of a global variable or a function that exists in another module.
Linkage
LinkOnceODR
Linkage
Reserved
Also see extension:
SPV_KHR_linkonce_odr
3.2.17. Access Qualifier
Defines the access permissions.
Used by
OpTypeImage
OpTypePipe
, and
OpTypeBufferSurfaceINTEL
Access Qualifier
Enabling Capabilities
ReadOnly
A read-only object.
Kernel
WriteOnly
A write-only object.
Kernel
ReadWrite
A readable and writable object.
Kernel
3.2.18. Function Parameter Attribute
Adds additional information to the return type and to each parameter of a function.
Only one of
Zext
and
Sext
can be used to decorate the same
, and no attribute may be used multiple times on the same
. Otherwise, multiple function parameter attributes can be applied to the same
Function Parameter Attribute
Enabling Capabilities
Zext
Zero extend the value, if needed.
Kernel
Sext
Sign extend the value, if needed.
Kernel
ByVal
Pass the parameter by value to the function. Only valid for pointer parameters (not for ret value).
Kernel
Sret
The parameter is the address of a structure that is the return value of the function in the source program. Only applicable to the first parameter, which must be a pointer parameter.
Kernel
NoAlias
The memory pointed to by a pointer parameter is not accessed via pointer values that are not derived from this pointer parameter. Only valid for pointer parameters. Not valid on return values.
Kernel
NoCapture
The parameter is not copied into a location that is accessible after returning from the callee. Only valid for pointer parameters. Not valid on return values.
Kernel
NoWrite
The parameter is not used to write to the memory pointed to. Only valid for pointer parameters. Not valid on return values.
Kernel
NoReadWrite
The parameter is not dereferenced, either to read or write the memory pointed to. Only valid for pointer parameters. Not valid on return values.
Kernel
5940
RuntimeAlignedALTERA (RuntimeAlignedINTEL)
RuntimeAlignedAttributeALTERA
3.2.19. Decoration
Decorations add additional information to an
or member of a structure.
It is invalid to decorate any given
or structure member more than one time with the same
decoration
, unless explicitly allowed below for a specific decoration.
Used by:
OpDecorate
OpMemberDecorate
OpDecorateId
OpMemberDecorateIdEXT
OpDecorateString
OpMemberDecorateString
Decoration
Extra Operands
Enabling Capabilities
RelaxedPrecision
Allow reduced precision operations. To be used as described in
Relaxed Precision
Shader
SpecId
Apply only to a scalar specialization constant.
Specialization Constant ID
is an unsigned 32-bit integer forming the external linkage for setting a specialized value. See
specialization
Literal
Specialization Constant ID
Shader
Kernel
Block
Apply only to a structure type to establish it is a memory interface block.
Shader
BufferBlock
Deprecated
(use
Block
-decorated
StorageBuffer
Storage Class
objects).
Apply only to a structure type to establish it is a memory interface block. When the type is used for a variable in the
Uniform
Storage Class the memory interface is a
StorageBuffer
-like interface, distinct from those variables decorated with
Block
. In all other Storage Classes the decoration is meaningless.
Shader
Missing after
version 1.3
RowMajor
Applies only to a member of a structure type. Only valid on a matrix or array whose most basic element is a matrix. Indicates that components within a row are contiguous in memory. Must not be used with
ColMajor
on the same matrix or matrix aggregate.
Matrix
ColMajor
Applies only to a member of a structure type. Only valid on a matrix or array whose most basic element is a matrix. Indicates that components within a column are contiguous in memory. Must not be used with
RowMajor
on the same matrix or matrix aggregate.
Matrix
ArrayStride
Apply to an array type to specify the stride, in bytes, of the array’s elements. Can also apply to a pointer type to an array element.
Array Stride
is an unsigned 32-bit integer specifying the stride of the array that the element resides in. Must not be applied to any other type.
Literal
Array Stride
Shader
MatrixStride
Applies only to a member of a structure type. Only valid on a matrix or array whose most basic element is a matrix.
Matrix Stride
is an unsigned 32-bit integer specifying the stride of the rows in a
RowMajor
-decorated matrix or columns in a
ColMajor
-decorated matrix.
Literal
Matrix Stride
Matrix
GLSLShared
Apply only to a structure type to get GLSL
shared
memory layout.
Shader
GLSLPacked
Apply only to a structure type to get GLSL
packed
memory layout.
Shader
10
CPacked
Apply only to a structure type, to marks it as "packed", indicating that the alignment of the structure is one and that there is no padding between structure members.
Kernel
11
BuiltIn
Indicates which built-in variable an object represents. See
BuiltIn
for more information.
BuiltIn
13
NoPerspective
Must only be used on a
memory object declaration
or a member of a structure type. Requests linear, non-perspective correct, interpolation. Only valid for the
Input
and
Output
Storage Classes
Shader
14
Flat
Must only be used on a
memory object declaration
or a member of a structure type. Indicates no interpolation is done. The non-interpolated value comes from a vertex, as specified by the client API. Only valid for the
Input
and
Output
Storage Classes
Shader
15
Patch
Must only be used on a
memory object declaration
or a member of a structure type. Indicates a tessellation patch. Only valid for the
Input
and
Output
Storage Classes
. Invalid to use on objects or types referenced by non-tessellation
Execution Models
Tessellation
16
Centroid
Must only be used on a
memory object declaration
or a member of a structure type. If used with multi-sampling rasterization, allows a single interpolation location for an entire pixel. The interpolation location lies in both the pixel and in the primitive being rasterized. Only valid for the
Input
and
Output
Storage Classes
Shader
17
Sample
Must only be used on a
memory object declaration
or a member of a structure type. If used with multi-sampling rasterization, requires per-sample interpolation. The interpolation locations are the locations of the samples lying in both the pixel and in the primitive being rasterized. Only valid for the
Input
and
Output
Storage Classes
SampleRateShading
18
Invariant
Apply only to a variable or member of a block-decorated structure type to indicate that expressions computing its value be computed invariantly with respect to other shaders computing the same expressions.
Shader
19
Restrict
Apply only to a
memory object declaration
, to indicate the compiler may compile as if there is no aliasing. See the
Aliasing
section for more detail.
20
Aliased
Apply only to a
memory object declaration
, to indicate the compiler is to generate accesses to the variable that work correctly in the presence of aliasing. See the
Aliasing
section for more detail.
21
Volatile
Must be applied only to
memory object declarations
or members of a structure type. Any such memory object declaration, or any memory object declaration that contains such a structure type, must be one of:
- An image with
Sampled
Operand of 2 and
Dim
other than
SubpassData
(see
OpTypeImage
).
- A block in the
StorageBuffer
storage class
, or in the
Uniform
storage class
with the
BufferBlock
decoration.
This indicates the memory holding the variable is volatile memory. Accesses to volatile memory cannot be eliminated, duplicated, or combined with other accesses. Volatile applies only to a single invocation and does not guarantee each invocation performs the access.
Volatile
is not allowed if the declared
memory model
is
Vulkan
. The
memory operand
bit
Volatile
, the
image operand
bit
VolatileTexel
, or the
memory semantic
bit
Volatile
can be used instead.
22
Constant
Indicates that a global variable is constant and
never
modified. Only allowed on global variables.
Kernel
23
Coherent
Must be applied only to
memory object declarations
or members of a structure type. Any such memory object declaration, or any memory object declaration that contains such a structure type, must be one of:
- An image with
Sampled
Operand of 2 and
Dim
other than
SubpassData
(see
OpTypeImage
).
- A block in the
StorageBuffer
storage class
, or in the
Uniform
storage class
with the
BufferBlock
decoration.
This indicates the memory backing the object is coherent.
Coherent
is not allowed if the declared
memory model
is
Vulkan
. The
memory operand
bits
MakePointerAvailable
and
MakePointerVisible
or the
image operand
bits
MakeTexelAvailable
and
MakeTexelVisible
can be used instead.
24
NonWritable
Must be applied only to
memory object declarations
or members of a structure type. Any such memory object declaration, or any memory object declaration that contains such a structure type, must be one of:
- An image with
Sampled
Operand of 2 and
Dim
other than
SubpassData
(see
OpTypeImage
).
- A block in the
StorageBuffer
storage class
, or in the
Uniform
storage class
with the
BufferBlock
decoration.
Missing before
version 1.4
: An object in the
Private
or
Function
storage classes.
This indicates that this module does not write to the memory holding the variable. It does not prevent the use of initializers on a declaration.
25
NonReadable
Must be applied only to
memory object declarations
or members of a structure type. Any such memory object declaration, or any memory object declaration that contains such a structure type, must be one of:
- An image with
Sampled
Operand of 2 and
Dim
other than
SubpassData
(see
OpTypeImage
).
- A block in the
StorageBuffer
storage class
, or in the
Uniform
storage class
with the
BufferBlock
decoration.
This indicates that this module does not read from the memory holding the variable. For image variables, it does not prevent query operations from reading metadata associated with the image.
26
Uniform
Apply only to an object. Asserts that, for each
dynamic instance
of the instruction that computes the result, all invocations in the same
tangle
within the invocation’s
Subgroup
scope compute the same result value.
Shader
UniformDecoration
27
UniformId
Apply only to an object. Asserts that, for each
dynamic instance
of the instruction that computes the result, all invocations in the same
tangle
within the invocation’s
Execution
scope compute the same result value.
Execution
must not be
Invocation
Scope
Execution
Shader
UniformDecoration
Missing before
version 1.4
28
SaturatedConversion
Indicates that a conversion to an integer type which is outside the representable range of
Result Type
is clamped to the nearest representable value of
Result Type
NaN
is converted to
This decoration must be applied only to conversion instructions to integer types, not including the
OpSatConvertUToS
and
OpSatConvertSToU
instructions.
Kernel
29
Stream
Must only be used on a
memory object declaration
or a member of a structure type.
Stream Number
is an unsigned 32-bit integer indicating the stream number to put an output on. Only valid for the
Output
Storage Class
and the
Geometry
Execution Model
Literal
Stream Number
GeometryStreams
30
Location
Apply only to a variable or a structure-type member.
Location
is an unsigned 32-bit integer that forms the main linkage for
Storage Class
Input
and
Output
variables:
- between the client API and vertex-stage inputs,
- between consecutive programmable stages, or
- between fragment-stage outputs and the client API.
It can also tag variables or structure-type members in the
UniformConstant
Storage Class
for linkage with the client API.
Only valid for the
Input
Output
, and
UniformConstant
Storage Classes
Literal
Location
Shader
31
Component
Must only be used on a
memory object declaration
or a member of a structure type.
Component
is an unsigned 32-bit integer indicating which component within a
Location
is taken by the decorated entity. Only valid for the
Input
and
Output
Storage Classes
Literal
Component
Shader
32
Index
Apply only to a variable.
Index
is an unsigned 32-bit integer identifying a blend equation input index, used as specified by the client API. Only valid for the
Output
Storage Class
and the
Fragment
Execution Model
Literal
Index
Shader
33
Binding
Apply only to a variable.
Binding Point
is an unsigned 32-bit integer forming part of the linkage between the client API and SPIR-V memory buffers, images, etc. See the client API specification for more detail.
Literal
Binding Point
Shader
34
DescriptorSet
Apply only to a variable.
Descriptor Set
is an unsigned 32-bit integer forming part of the linkage between the client API and SPIR-V memory buffers, images, etc. See the client API specification for more detail.
Literal
Descriptor Set
Shader
35
Offset
Apply only to a structure-type member.
Byte Offset
is an unsigned 32-bit integer. It dictates the byte offset of the member relative to the beginning of the structure. It can be used, for example, by both uniform and transform-feedback buffers. It must not cause any overlap of the structure’s members, or overflow of a transform-feedback buffer’s
XfbStride
Literal
Byte Offset
Shader
36
XfbBuffer
Must only be used on a
memory object declaration
or a member of a structure type.
XFB Buffer
is an unsigned 32-bit integer indicating which transform-feedback buffer an output is written to. Only valid for the
Output
Storage Classes
of
vertex processing
Execution Models
Literal
XFB Buffer Number
TransformFeedback
37
XfbStride
Apply to anything
XfbBuffer
is applied to.
XFB Stride
is an unsigned 32-bit integer specifying the stride, in bytes, of transform-feedback buffer vertices. If the transform-feedback buffer is capturing any double-precision components, the stride must be a multiple of 8, otherwise it must be a multiple of 4.
Literal
XFB Stride
TransformFeedback
38
FuncParamAttr
Indicates a function return value or parameter attribute. Multiple uses of this decoration are allowed on the same
, as described in the
function parameter attributes
Function Parameter Attribute
Function Parameter Attribute
Kernel
39
FPRoundingMode
Indicates a floating-point rounding mode.
FP Rounding Mode
Floating-Point Rounding Mode
40
FPFastMathMode
Indicates a floating-point fast math flag.
FP Fast Math Mode
Fast-Math Mode
Kernel
FloatControls2
41
LinkageAttributes
Associate linkage attributes to values.
Name
is a string specifying what name the
Linkage Type
applies to. Only valid on
OpFunction
or global (module scope)
OpVariable
. See
linkage
Literal
Name
Linkage Type
Linkage Type
Linkage
42
NoContraction
Apply only to an
arithmetic instruction
to indicate the operation cannot be combined with another instruction to form a single operation. For example, if applied to an
OpFMul
, that multiply can’t be combined with an addition to yield a fused multiply-add operation. Furthermore, such operations are not allowed to reassociate; e.g., add(a + add(b+c)) cannot be transformed to add(add(a+b) + c).
Shader
43
InputAttachmentIndex
Apply only to a variable.
Attachment Index
is an unsigned 32-bit integer providing an input-target index (as specified by the client API). Only valid in the
Fragment
Execution Model
and for variables of type
OpTypeImage
with a
Dim
operand of
SubpassData
Literal
Attachment Index
InputAttachment
44
Alignment
Apply only to a pointer.
Alignment
is an unsigned 32-bit integer declaring a known minimum alignment the pointer has.
Literal
Alignment
Kernel
45
MaxByteOffset
Apply only to a pointer.
Max Byte Offset
is an unsigned 32-bit integer declaring a known maximum byte offset this pointer will be incremented by from the point of the decoration. This is a guaranteed upper bound when applied to
OpFunctionParameter
Literal
Max Byte Offset
Addresses
Missing before
version 1.1
46
AlignmentId
Same as the
Alignment
decoration
, but using an
operand instead of a literal. The operand is consumed as unsigned and must be an
integer type
scalar.
Alignment
Kernel
Missing before
version 1.2
47
MaxByteOffsetId
Same as the
MaxByteOffset
decoration
, but using an
operand instead of a literal. The operand is consumed as unsigned and must be an
integer type
scalar.
Max Byte Offset
Addresses
Missing before
version 1.2
4216
SaturatedToLargestFloat8NormalConversionEXT
Float8EXT
Reserved
4469
NoSignedWrap
Apply to an instruction to indicate that it does not cause signed integer wrapping to occur, in the form of overflow or underflow.
It must decorate only the following instructions:
OpIAdd
OpISub
OpIMul
OpShiftLeftLogical
OpSNegate
OpExtInst
for instruction numbers specified in the extended instruction-set specifications as accepting this decoration.
If an instruction decorated with
NoSignedWrap
does overflow or underflow,
behavior is undefined
Missing before
version 1.4
Also see extension:
SPV_KHR_no_integer_wrap_decoration
4470
NoUnsignedWrap
Apply to an instruction to indicate that it does not cause unsigned integer wrapping to occur, in the form of overflow or underflow.
It must decorate only the following instructions:
OpIAdd
OpISub
OpIMul
OpShiftLeftLogical
OpExtInst
for instruction numbers specified in the extended instruction-set specifications as accepting this decoration.
If an instruction decorated with
NoUnsignedWrap
does overflow or underflow,
behavior is undefined
Missing before
version 1.4
Also see extension:
SPV_KHR_no_integer_wrap_decoration
4487
WeightTextureQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing
4488
BlockMatchTextureQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing
4499
BlockMatchSamplerQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing2
4999
ExplicitInterpAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
5019
NodeSharesPayloadLimitsWithAMDX
Payload Type
ShaderEnqueueAMDX
Reserved
5020
NodeMaxPayloadsAMDX
Max number of payloads
ShaderEnqueueAMDX
Reserved
5078
TrackFinishWritingAMDX
ShaderEnqueueAMDX
Reserved
5091
PayloadNodeNameAMDX
Node Name
ShaderEnqueueAMDX
Reserved
5098
PayloadNodeBaseIndexAMDX
Base Index
ShaderEnqueueAMDX
Reserved
5099
PayloadNodeSparseArrayAMDX
ShaderEnqueueAMDX
Reserved
5100
PayloadNodeArraySizeAMDX
Array Size
ShaderEnqueueAMDX
Reserved
5105
PayloadDispatchIndirectAMDX
ShaderEnqueueAMDX
Reserved
5124
ArrayStrideIdEXT
Array Stride
DescriptorHeapEXT
Reserved
5125
OffsetIdEXT
Byte Offset
DescriptorHeapEXT
Reserved
5248
OverrideCoverageNV
SampleMaskOverrideCoverageNV
Reserved
Also see extension:
SPV_NV_sample_mask_override_coverage
5250
PassthroughNV
GeometryShaderPassthroughNV
Reserved
Also see extension:
SPV_NV_geometry_shader_passthrough
5252
ViewportRelativeNV
ShaderViewportMaskNV
Reserved
5256
SecondaryViewportRelativeNV
Literal
Offset
ShaderStereoViewNV
Reserved
Also see extension:
SPV_NV_stereo_view_rendering
5271
PerPrimitiveEXT (PerPrimitiveNV)
MeshShadingNV
MeshShadingEXT
Reserved
Also see extensions:
SPV_NV_mesh_shader
SPV_EXT_mesh_shader
5272
PerViewNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5273
PerTaskNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5285
PerVertexKHR (PerVertexNV)
FragmentBarycentricKHR
Reserved
Also see extensions:
SPV_NV_fragment_shader_barycentric
SPV_KHR_fragment_shader_barycentric
5300
NonUniform (NonUniformEXT)
Apply only to an object. Asserts that the value backing the decorated
is
not dynamically uniform
. See the client API specification for more detail.
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5355
RestrictPointer (RestrictPointerEXT)
Apply only to a
memory object declaration
, to indicate the compiler may compile as if there is no aliasing of the pointer stored in the variable. See the
aliasing section
for more detail.
PhysicalStorageBufferAddresses
Missing before
version 1.5
Also see extensions:
SPV_EXT_physical_storage_buffer
SPV_KHR_physical_storage_buffer
5356
AliasedPointer (AliasedPointerEXT)
Apply only to a
memory object declaration
, to indicate the compiler is to generate accesses to the pointer stored in the variable that work correctly in the presence of aliasing. See the
aliasing section
for more detail.
PhysicalStorageBufferAddresses
Missing before
version 1.5
Also see extensions:
SPV_EXT_physical_storage_buffer
SPV_KHR_physical_storage_buffer
5358
MemberOffsetNV
Literal
memberOffset
PushConstantBanksNV
Reserved
5386
HitObjectShaderRecordBufferNV
ShaderInvocationReorderNV
Reserved
5389
HitObjectShaderRecordBufferEXT
ShaderInvocationReorderEXT
Reserved
5397
BankNV
Literal
Bank
PushConstantBanksNV
Reserved
5398
BindlessSamplerNV
BindlessTextureNV
Reserved
5399
BindlessImageNV
BindlessTextureNV
Reserved
5400
BoundSamplerNV
BindlessTextureNV
Reserved
5401
BoundImageNV
BindlessTextureNV
Reserved
5599
SIMTCallINTEL
Literal
VectorComputeINTEL
Reserved
5602
ReferencedIndirectlyINTEL
IndirectReferencesINTEL
Reserved
Also see extension:
SPV_INTEL_function_pointers
5607
ClobberINTEL
Literal
AsmINTEL
Reserved
5608
SideEffectsINTEL
AsmINTEL
Reserved
5624
VectorComputeVariableINTEL
VectorComputeINTEL
Reserved
5625
FuncParamIOKindINTEL
Literal
Kind
VectorComputeINTEL
Reserved
5626
VectorComputeFunctionINTEL
VectorComputeINTEL
Reserved
5627
StackCallINTEL
VectorComputeINTEL
Reserved
5628
GlobalVariableOffsetINTEL
Literal
Offset
VectorComputeINTEL
Reserved
5634
CounterBuffer (HlslCounterBufferGOOGLE)
The
of a counter buffer associated with the decorated buffer. It must decorate only a variable in the
Uniform
storage class
Counter Buffer
must be a variable in the
Uniform
storage class.
Counter Buffer
Missing before
version 1.4
Also see extension:
SPV_GOOGLE_hlsl_functionality1
5635
UserSemantic (HlslSemanticGOOGLE)
Semantic
is a string describing a user-defined semantic intent of what it decorates. User-defined semantics are case insensitive. It must decorate only a variable or a member of a structure type.
If decorating a variable, the variable must be in the
Input
or
Output
storage classes
. If decorating a structure member, memory object declarations that contain such structure type can be in any
storage classe
A variable or a structure member can be decorated more than one time with this decoration, but at most once for any particular string operand.
Literal
Semantic
Missing before
version 1.4
Also see extension:
SPV_GOOGLE_hlsl_functionality1
5636
UserTypeGOOGLE
Literal
User Type
Reserved
Also see extension:
SPV_GOOGLE_user_type
5822
FunctionRoundingModeINTEL
Literal
Target Width
FP Rounding Mode
FP Rounding Mode
FunctionFloatControlINTEL
Reserved
5823
FunctionDenormModeINTEL
Literal
Target Width
FP Denorm Mode
FP Denorm Mode
FunctionFloatControlINTEL
Reserved
5825
RegisterALTERA (RegisterINTEL)
FPGAMemoryAttributesALTERA
Reserved
5826
MemoryALTERA (MemoryINTEL)
Literal
Memory Type
FPGAMemoryAttributesALTERA
Reserved
5827
NumbanksALTERA (NumbanksINTEL)
Literal
Banks
FPGAMemoryAttributesALTERA
Reserved
5828
BankwidthALTERA (BankwidthINTEL)
Literal
Bank Width
FPGAMemoryAttributesALTERA
Reserved
5829
MaxPrivateCopiesALTERA (MaxPrivateCopiesINTEL)
Literal
Maximum Copies
FPGAMemoryAttributesALTERA
Reserved
5830
SinglepumpALTERA (SinglepumpINTEL)
FPGAMemoryAttributesALTERA
Reserved
5831
DoublepumpALTERA (DoublepumpINTEL)
FPGAMemoryAttributesALTERA
Reserved
5832
MaxReplicatesALTERA (MaxReplicatesINTEL)
Literal
Maximum Replicates
FPGAMemoryAttributesALTERA
Reserved
5833
SimpleDualPortALTERA (SimpleDualPortINTEL)
FPGAMemoryAttributesALTERA
Reserved
5834
MergeALTERA (MergeINTEL)
Literal
Merge Key
Literal
Merge Type
FPGAMemoryAttributesALTERA
Reserved
5835
BankBitsALTERA (BankBitsINTEL)
Literal
Bank Bits
FPGAMemoryAttributesALTERA
Reserved
5836
ForcePow2DepthALTERA (ForcePow2DepthINTEL)
Literal
Force Key
FPGAMemoryAttributesALTERA
Reserved
5883
StridesizeALTERA (StridesizeINTEL)
Literal
Stride Size
FPGAMemoryAttributesALTERA
Reserved
5884
WordsizeALTERA (WordsizeINTEL)
Literal
Word Size
FPGAMemoryAttributesALTERA
Reserved
5885
TrueDualPortALTERA (TrueDualPortINTEL)
FPGAMemoryAttributesALTERA
Reserved
5899
BurstCoalesceALTERA (BurstCoalesceINTEL)
FPGAMemoryAccessesALTERA
Reserved
5900
CacheSizeALTERA (CacheSizeINTEL)
Literal
Cache Size in bytes
FPGAMemoryAccessesALTERA
Reserved
5901
DontStaticallyCoalesceALTERA (DontStaticallyCoalesceINTEL)
FPGAMemoryAccessesALTERA
Reserved
5902
PrefetchALTERA (PrefetchINTEL)
Literal
Prefetcher Size in bytes
FPGAMemoryAccessesALTERA
Reserved
5905
StallEnableALTERA (StallEnableINTEL)
FPGAClusterAttributesALTERA
Reserved
5907
FuseLoopsInFunctionALTERA (FuseLoopsInFunctionINTEL)
LoopFuseALTERA
Reserved
5909
MathOpDSPModeALTERA (MathOpDSPModeINTEL)
Literal
Mode
Literal
Propagate
FPGADSPControlALTERA
Reserved
5914
AliasScopeINTEL
Aliasing Scopes List
MemoryAccessAliasingINTEL
Reserved
5915
NoAliasINTEL
Aliasing Scopes List
MemoryAccessAliasingINTEL
Reserved
5917
InitiationIntervalALTERA (InitiationIntervalINTEL)
Literal
Cycles
FPGAInvocationPipeliningAttributesALTERA
Reserved
5918
MaxConcurrencyALTERA (MaxConcurrencyINTEL)
Literal
Invocations
FPGAInvocationPipeliningAttributesALTERA
Reserved
5919
PipelineEnableALTERA (PipelineEnableINTEL)
Literal
Enable
FPGAInvocationPipeliningAttributesALTERA
Reserved
5921
BufferLocationALTERA (BufferLocationINTEL)
Literal
Buffer Location ID
FPGABufferLocationALTERA
Reserved
5944
IOPipeStorageALTERA (IOPipeStorageINTEL)
Literal
IO Pipe ID
IOPipesALTERA
Reserved
6080
FunctionFloatingPointModeINTEL
Literal
Target Width
FP Operation Mode
FP Operation Mode
FunctionFloatControlINTEL
Reserved
6085
SingleElementVectorINTEL
VectorComputeINTEL
Reserved
6087
VectorComputeCallableFunctionINTEL
VectorComputeINTEL
Reserved
6140
MediaBlockIOINTEL
VectorComputeINTEL
Reserved
6151
StallFreeALTERA (StallFreeINTEL)
FPGAClusterAttributesV2ALTERA
Reserved
6170
FPMaxErrorDecorationINTEL
Literal
Max Error
FPMaxErrorINTEL
Reserved
6172
LatencyControlLabelALTERA (LatencyControlLabelINTEL)
Literal
Latency Label
FPGALatencyControlALTERA
Reserved
6173
LatencyControlConstraintALTERA (LatencyControlConstraintINTEL)
Literal
Relative To
Literal
Control Type
Literal
Relative Cycle
FPGALatencyControlALTERA
Reserved
6175
ConduitKernelArgumentALTERA (ConduitKernelArgumentINTEL)
FPGAArgumentInterfacesALTERA
Reserved
6176
RegisterMapKernelArgumentALTERA (RegisterMapKernelArgumentINTEL)
FPGAArgumentInterfacesALTERA
Reserved
6177
MMHostInterfaceAddressWidthALTERA (MMHostInterfaceAddressWidthINTEL)
Literal
AddressWidth
FPGAArgumentInterfacesALTERA
Reserved
6178
MMHostInterfaceDataWidthALTERA (MMHostInterfaceDataWidthINTEL)
Literal
DataWidth
FPGAArgumentInterfacesALTERA
Reserved
6179
MMHostInterfaceLatencyALTERA (MMHostInterfaceLatencyINTEL)
Literal
Latency
FPGAArgumentInterfacesALTERA
Reserved
6180
MMHostInterfaceReadWriteModeALTERA (MMHostInterfaceReadWriteModeINTEL)
Access Qualifier
ReadWriteMode
FPGAArgumentInterfacesALTERA
Reserved
6181
MMHostInterfaceMaxBurstALTERA (MMHostInterfaceMaxBurstINTEL)
Literal
MaxBurstCount
FPGAArgumentInterfacesALTERA
Reserved
6182
MMHostInterfaceWaitRequestALTERA (MMHostInterfaceWaitRequestINTEL)
Literal
Waitrequest
FPGAArgumentInterfacesALTERA
Reserved
6183
StableKernelArgumentALTERA (StableKernelArgumentINTEL)
FPGAArgumentInterfacesALTERA
Reserved
6188
HostAccessINTEL
Host Access Qualifier
Access
Literal
Name
GlobalVariableHostAccessINTEL
Reserved
6190
InitModeALTERA (InitModeINTEL)
Initialization Mode Qualifier
Trigger
GlobalVariableFPGADecorationsALTERA
Reserved
6191
ImplementInRegisterMapALTERA (ImplementInRegisterMapINTEL)
Literal
Value
GlobalVariableFPGADecorationsALTERA
Reserved
6247
ConditionalINTEL
Condition
SpecConditionalINTEL
Reserved
6442
CacheControlLoadINTEL
Literal
Cache Level
Load Cache Control
Cache Control
CacheControlsINTEL
Reserved
6443
CacheControlStoreINTEL
Literal
Cache Level
Store Cache Control
Cache Control
CacheControlsINTEL
Reserved
3.2.20. BuiltIn
Used when
Decoration
is
BuiltIn
. Apply to:
The result
of the
OpVariable
declaration of the built-in variable,
A structure-type member, if the built-in is a member of a structure, or
Deprecated
: a
constant instruction
, when the built-in is a constant.
As stated per entry below, these have additional semantics and constraints specified by the client API.
For all the declarations of all the global variables and constants statically referenced by the entry-point’s call tree, within any specific storage class it is invalid to decorate with a specific
BuiltIn
more than once.
Application to a
constant instruction
has previously been used to define the workgroup size with specialization constants in some client APIs. As of version 1.6, all client APIs should instead use the
LocalSizeId
execution mode
BuiltIn
Enabling Capabilities
Position
Output vertex position from a
vertex processing
Execution Model
. See the client API specification for more detail.
Shader
PointSize
Output point size from a
vertex processing
Execution Model
. See the client API specification for more detail.
Shader
ClipDistance
Array of clip distances. See the client API specification for more detail.
ClipDistance
CullDistance
Array of clip distances. See the client API specification for more detail.
CullDistance
VertexId
Input vertex ID to a
Vertex
Execution Model
. See the client API specification for more detail.
Shader
InstanceId
Input instance ID to a
Vertex
Execution Model
. See the client API specification for more detail.
Shader
PrimitiveId
Primitive ID in a
Geometry
Execution Model
. See the client API specification for more detail.
Geometry
Tessellation
RayTracingNV
RayTracingKHR
MeshShadingNV
MeshShadingEXT
InvocationId
Invocation ID, input to
Geometry
and
TessellationControl
Execution Model
. See the client API specification for more detail.
Geometry
Tessellation
Layer
Layer selection for multi-layer framebuffer. See the client API specification for more detail.
The
Geometry
capability
allows for a
Layer
output by a
Geometry
Execution Model
, input to a
Fragment
Execution Model
The
ShaderLayer
capability
allows for
Layer
output by a
Vertex
or
Tessellation
Execution Model
Geometry
ShaderLayer
ShaderViewportIndexLayerEXT
MeshShadingNV
MeshShadingEXT
10
ViewportIndex
Viewport selection for viewport transformation when using multiple viewports. See the client API specification for more detail.
The
MultiViewport
capability
allows for a
ViewportIndex
output by a
Geometry
Execution Model
, input to a
Fragment
Execution Model
The
ShaderViewportIndex
capability
allows for a
ViewportIndex
output by a
Vertex
or
Tessellation
Execution Model
MultiViewport
ShaderViewportIndex
ShaderViewportIndexLayerEXT
MeshShadingNV
MeshShadingEXT
11
TessLevelOuter
Output patch outer levels in a
TessellationControl
Execution Model
. See the client API specification for more detail.
Tessellation
12
TessLevelInner
Output patch inner levels in a
TessellationControl
Execution Model
. See the client API specification for more detail.
Tessellation
13
TessCoord
Input vertex position in
TessellationEvaluation
Execution Model
. See the client API specification for more detail.
Tessellation
14
PatchVertices
Input patch vertex count in a tessellation
Execution Model
. See the client API specification for more detail.
Tessellation
15
FragCoord
Coordinates
(x, y, z, 1/w)
of the current fragment, input to the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
16
PointCoord
Coordinates within a
point
, input to the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
17
FrontFacing
Face direction, input to the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
18
SampleId
Input sample number to the
Fragment
Execution Model
. See the client API specification for more detail.
SampleRateShading
19
SamplePosition
Input sample position to the
Fragment
Execution Model
. See the client API specification for more detail.
SampleRateShading
20
SampleMask
Input or output sample mask to the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
22
FragDepth
Output fragment depth from the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
23
HelperInvocation
Input whether a helper invocation, to the
Fragment
Execution Model
. See the client API specification for more detail.
Shader
24
NumWorkgroups
Number of workgroups in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
25
WorkgroupSize
Workgroup size in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
26
WorkgroupId
Workgroup ID in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
27
LocalInvocationId
Local invocation ID in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
28
GlobalInvocationId
Global invocation ID in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
29
LocalInvocationIndex
Local invocation index in
GLCompute
Execution Models
. See the client API specification for more detail.
Workgroup Linear ID in
Kernel
Execution Models
. See the client API specification for more detail.
30
WorkDim
Work dimensions in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
31
GlobalSize
Global size in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
32
EnqueuedWorkgroupSize
Enqueued workgroup size in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
33
GlobalOffset
Global offset in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
34
GlobalLinearId
Global linear ID in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
36
SubgroupSize
Subgroup size. See the client API specification for more detail.
Kernel
GroupNonUniform
SubgroupBallotKHR
37
SubgroupMaxSize
Subgroup maximum size in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
38
NumSubgroups
Number of subgroups in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
GroupNonUniform
39
NumEnqueuedSubgroups
Number of enqueued subgroups in
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
40
SubgroupId
Subgroup ID in
GLCompute
or
Kernel
Execution Models
. See the client API specification for more detail.
Kernel
GroupNonUniform
41
SubgroupLocalInvocationId
Subgroup local invocation ID. See the client API specification for more detail.
Kernel
GroupNonUniform
SubgroupBallotKHR
42
VertexIndex
Vertex index. See the client API specification for more detail.
Shader
43
InstanceIndex
Instance index. See the client API specification for more detail.
Shader
4160
CoreIDARM
CoreBuiltinsARM
4161
CoreCountARM
CoreBuiltinsARM
4162
CoreMaxIDARM
CoreBuiltinsARM
4163
WarpIDARM
CoreBuiltinsARM
4164
WarpMaxIDARM
CoreBuiltinsARM
4416
SubgroupEqMask (SubgroupEqMaskKHR)
Subgroup invocations bitmask where bit index =
SubgroupLocalInvocationId
See the client API specification for more detail.
SubgroupBallotKHR
GroupNonUniformBallot
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_ballot
4417
SubgroupGeMask (SubgroupGeMaskKHR)
Subgroup invocations bitmask where bit index ≥
SubgroupLocalInvocationId
See the client API specification for more detail.
SubgroupBallotKHR
GroupNonUniformBallot
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_ballot
4418
SubgroupGtMask (SubgroupGtMaskKHR)
Subgroup invocations bitmask where bit index >
SubgroupLocalInvocationId
See the client API specification for more detail.
SubgroupBallotKHR
GroupNonUniformBallot
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_ballot
4419
SubgroupLeMask (SubgroupLeMaskKHR)
Subgroup invocations bitmask where bit index ≤
SubgroupLocalInvocationId
See the client API specification for more detail.
SubgroupBallotKHR
GroupNonUniformBallot
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_ballot
4420
SubgroupLtMask (SubgroupLtMaskKHR)
Subgroup invocations bitmask where bit index <
SubgroupLocalInvocationId
See the client API specification for more detail.
SubgroupBallotKHR
GroupNonUniformBallot
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_ballot
4424
BaseVertex
Base vertex component of vertex ID.
See the client API specification for more detail.
DrawParameters
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_draw_parameters
4425
BaseInstance
Base instance component of instance ID.
See the client API specification for more detail.
DrawParameters
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_draw_parameters
4426
DrawIndex
Contains the index of the draw currently being processed.
See the client API specification for more detail.
DrawParameters
MeshShadingNV
MeshShadingEXT
Missing before
version 1.3
Also see extensions:
SPV_KHR_shader_draw_parameters
SPV_NV_mesh_shader
SPV_EXT_mesh_shader
4432
PrimitiveShadingRateKHR
FragmentShadingRateKHR
Reserved
Also see extension:
SPV_KHR_fragment_shading_rate
4438
DeviceIndex
Input device index of the logical device.
See the client API specification for more detail.
DeviceGroup
Missing before
version 1.3
Also see extension:
SPV_KHR_device_group
4440
ViewIndex
Input view index of the view currently being rendered to.
See the client API specification for more detail.
MultiView
Missing before
version 1.3
Also see extension:
SPV_KHR_multiview
4444
ShadingRateKHR
FragmentShadingRateKHR
Reserved
Also see extension:
SPV_KHR_fragment_shading_rate
4492
TileOffsetQCOM
TileShadingQCOM
Reserved
4493
TileDimensionQCOM
TileShadingQCOM
Reserved
4494
TileApronSizeQCOM
TileShadingQCOM
Reserved
4992
BaryCoordNoPerspAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4993
BaryCoordNoPerspCentroidAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4994
BaryCoordNoPerspSampleAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4995
BaryCoordSmoothAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4996
BaryCoordSmoothCentroidAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4997
BaryCoordSmoothSampleAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
4998
BaryCoordPullModelAMD
Reserved
Also see extension:
SPV_AMD_shader_explicit_vertex_parameter
5014
FragStencilRefEXT
StencilExportEXT
Reserved
Also see extension:
SPV_EXT_shader_stencil_export
5021
RemainingRecursionLevelsAMDX
ShaderEnqueueAMDX
Reserved
5073
ShaderIndexAMDX
ShaderEnqueueAMDX
Reserved
5122
SamplerHeapEXT
DescriptorHeapEXT
Reserved
5123
ResourceHeapEXT
DescriptorHeapEXT
Reserved
5253
ViewportMaskNV
ShaderViewportMaskNV
MeshShadingNV
Reserved
Also see extensions:
SPV_NV_viewport_array2
SPV_NV_mesh_shader
5257
SecondaryPositionNV
ShaderStereoViewNV
Reserved
Also see extension:
SPV_NV_stereo_view_rendering
5258
SecondaryViewportMaskNV
ShaderStereoViewNV
Reserved
Also see extension:
SPV_NV_stereo_view_rendering
5261
PositionPerViewNV
PerViewAttributesNV
MeshShadingNV
Reserved
Also see extensions:
SPV_NVX_multiview_per_view_attributes
SPV_NV_mesh_shader
5262
ViewportMaskPerViewNV
PerViewAttributesNV
MeshShadingNV
Reserved
Also see extensions:
SPV_NVX_multiview_per_view_attributes
SPV_NV_mesh_shader
5264
FullyCoveredEXT
FragmentFullyCoveredEXT
Reserved
Also see extension:
SPV_EXT_fragment_fully_covered
5274
TaskCountNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5275
PrimitiveCountNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5276
PrimitiveIndicesNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5277
ClipDistancePerViewNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5278
CullDistancePerViewNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5279
LayerPerViewNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5280
MeshViewCountNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5281
MeshViewIndicesNV
MeshShadingNV
Reserved
Also see extension:
SPV_NV_mesh_shader
5286
BaryCoordKHR (BaryCoordNV)
FragmentBarycentricKHR
Reserved
Also see extensions:
SPV_NV_fragment_shader_barycentric
SPV_KHR_fragment_shader_barycentric
5287
BaryCoordNoPerspKHR (BaryCoordNoPerspNV)
FragmentBarycentricKHR
Reserved
Also see extensions:
SPV_NV_fragment_shader_barycentric
SPV_KHR_fragment_shader_barycentric
5292
FragSizeEXT (FragmentSizeNV)
FragmentDensityEXT
Reserved
Also see extensions:
SPV_EXT_fragment_invocation_density
SPV_NV_shading_rate
5293
FragInvocationCountEXT (InvocationsPerPixelNV)
FragmentDensityEXT
Reserved
Also see extensions:
SPV_EXT_fragment_invocation_density
SPV_NV_shading_rate
5294
PrimitivePointIndicesEXT
MeshShadingEXT
Reserved
Also see extension:
SPV_EXT_mesh_shader
5295
PrimitiveLineIndicesEXT
MeshShadingEXT
Reserved
Also see extension:
SPV_EXT_mesh_shader
5296
PrimitiveTriangleIndicesEXT
MeshShadingEXT
Reserved
Also see extension:
SPV_EXT_mesh_shader
5299
CullPrimitiveEXT
MeshShadingEXT
Reserved
Also see extension:
SPV_EXT_mesh_shader
5319
LaunchIdKHR (LaunchIdNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5320
LaunchSizeKHR (LaunchSizeNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5321
WorldRayOriginKHR (WorldRayOriginNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5322
WorldRayDirectionKHR (WorldRayDirectionNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5323
ObjectRayOriginKHR (ObjectRayOriginNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5324
ObjectRayDirectionKHR (ObjectRayDirectionNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5325
RayTminKHR (RayTminNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5326
RayTmaxKHR (RayTmaxNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5327
InstanceCustomIndexKHR (InstanceCustomIndexNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5330
ObjectToWorldKHR (ObjectToWorldNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5331
WorldToObjectKHR (WorldToObjectNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5332
HitTNV
RayTracingNV
Reserved
Also see extension:
SPV_NV_ray_tracing
5333
HitKindKHR (HitKindNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5334
CurrentRayTimeNV
RayTracingMotionBlurNV
Reserved
Also see extension:
SPV_NV_ray_tracing_motion_blur
5335
HitTriangleVertexPositionsKHR
RayTracingPositionFetchKHR
Reserved
5337
HitMicroTriangleVertexPositionsNV
RayTracingDisplacementMicromapNV
Reserved
5344
HitMicroTriangleVertexBarycentricsNV
RayTracingDisplacementMicromapNV
Reserved
5351
IncomingRayFlagsKHR (IncomingRayFlagsNV)
RayTracingNV
RayTracingKHR
Reserved
Also see extensions:
SPV_NV_ray_tracing
SPV_KHR_ray_tracing
5352
RayGeometryIndexKHR
RayTracingKHR
Reserved
Also see extension:
SPV_KHR_ray_tracing
5359
HitIsSphereNV
RayTracingSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5360
HitIsLSSNV
RayTracingLinearSweptSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5361
HitSpherePositionNV
RayTracingSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5374
WarpsPerSMNV
ShaderSMBuiltinsNV
Reserved
Also see extension:
SPV_NV_shader_sm_builtins
5375
SMCountNV
ShaderSMBuiltinsNV
Reserved
Also see extension:
SPV_NV_shader_sm_builtins
5376
WarpIDNV
ShaderSMBuiltinsNV
Reserved
Also see extension:
SPV_NV_shader_sm_builtins
5377
SMIDNV
ShaderSMBuiltinsNV
Reserved
Also see extension:
SPV_NV_shader_sm_builtins
5396
HitLSSPositionsNV
RayTracingLinearSweptSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5405
HitKindFrontFacingMicroTriangleNV
RayTracingDisplacementMicromapNV
Reserved
5406
HitKindBackFacingMicroTriangleNV
RayTracingDisplacementMicromapNV
Reserved
5420
HitSphereRadiusNV
RayTracingSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5421
HitLSSRadiiNV
RayTracingLinearSweptSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5436
ClusterIDNV
RayTracingClusterAccelerationStructureNV
Reserved
Also see extension:
SPV_NV_cluster_acceleration_structure
6021
CullMaskKHR
RayCullMaskKHR
Reserved
Also see extension:
SPV_KHR_ray_cull_mask
3.2.21. Selection Control
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpSelectionMerge
Selection Control
Enabling Capabilities
0x0
None
0x1
Flatten
Performance hint. Strong request to optimize away the control flow for this selection.
0x2
DontFlatten
Performance hint. Strong request to keep this selection as control flow.
3.2.22. Loop Control
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Bits that are set indicate whether an additional operand follows, as described by the table. If there are multiple following operands indicated, they are ordered: Those indicated by smaller-numbered bits appear first.
Used by
OpLoopMerge
Loop Control
Enabling Capabilities
0x0
None
0x1
Unroll
Performance hint. Strong request to unroll or unwind this loop.
This must not be used with the
DontUnroll
bit.
0x2
DontUnroll
Performance hint. Strong request to keep this loop as a loop, without unrolling.
This must not be used with the
Unroll
PeelCount
, or
PartialCount
bits.
0x4
DependencyInfinite
Guarantees that there are no dependencies between loop iterations.
Missing before
version 1.1
0x8
DependencyLength
Guarantees that there are no dependencies between a number of loop iterations. The dependency length is specified in a subsequent unsigned 32-bit integer literal operand.
Missing before
version 1.1
0x10
MinIterations
Unchecked assertion that the loop executes at least a given number of iterations. The iteration count is specified in a subsequent unsigned 32-bit integer literal operand.
Missing before
version 1.4
0x20
MaxIterations
Unchecked assertion that the loop executes at most a given number of iterations. The iteration count is specified in a subsequent unsigned 32-bit integer literal operand.
Missing before
version 1.4
0x40
IterationMultiple
Unchecked assertion that the loop executes a multiple of a given number of iterations. The number is specified in a subsequent unsigned 32-bit integer literal operand. It must be greater than 0.
Missing before
version 1.4
0x80
PeelCount
Performance hint. Request that the loop be peeled by a given number of loop iterations. The peel count is specified in a subsequent unsigned 32-bit integer literal operand.
This must not be used with the
DontUnroll
bit.
Missing before
version 1.4
0x100
PartialCount
Performance hint. Request that the loop be partially unrolled by a given number of loop iterations. The unroll count is specified in a subsequent unsigned 32-bit integer literal operand.
This must not be used with the
DontUnroll
bit.
Missing before
version 1.4
0x10000
InitiationIntervalALTERA (InitiationIntervalINTEL)
FPGALoopControlsALTERA
Reserved
0x20000
MaxConcurrencyALTERA (MaxConcurrencyINTEL)
FPGALoopControlsALTERA
Reserved
0x40000
DependencyArrayALTERA (DependencyArrayINTEL)
FPGALoopControlsALTERA
Reserved
0x80000
PipelineEnableALTERA (PipelineEnableINTEL)
FPGALoopControlsALTERA
Reserved
0x100000
LoopCoalesceALTERA (LoopCoalesceINTEL)
FPGALoopControlsALTERA
Reserved
0x200000
MaxInterleavingALTERA (MaxInterleavingINTEL)
FPGALoopControlsALTERA
Reserved
0x400000
SpeculatedIterationsALTERA (SpeculatedIterationsINTEL)
FPGALoopControlsALTERA
Reserved
0x800000
NoFusionALTERA (NoFusionINTEL)
FPGALoopControlsALTERA
Reserved
0x1000000
LoopCountALTERA (LoopCountINTEL)
FPGALoopControlsALTERA
Reserved
0x2000000
MaxReinvocationDelayALTERA (MaxReinvocationDelayINTEL)
FPGALoopControlsALTERA
Reserved
3.2.23. Function Control
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpFunction
Function Control
Enabling Capabilities
0x0
None
0x1
Inline
Performance hint. Strong request to inline the function.
0x2
DontInline
Performance hint. Strong request to not inline the function.
0x4
Pure
Compiler can assume this function has no side effect, but might read global memory or read through dereferenced function parameters. Always computes the same result when called with the same argument values and the same global state.
0x8
Const
Compiler assumes this function has no side effects, and does not access global memory or dereference function parameters. Always computes the same result for the same argument values.
0x10000
OptNoneEXT (OptNoneINTEL)
OptNoneEXT
Reserved
3.2.24. Memory Semantics
The
's value is a mask; it can be formed by combining the bits from multiple rows in the table below.
The value’s type must be a 32-bit integer scalar. This value is expected to be formed only from the bits in the table below, where at most one of these four bits can be set:
Acquire
Release
AcquireRelease
, or
SequentiallyConsistent
. If validation rules or the client API require a constant
, it is invalid for the value to not be formed this expected way. If non-constant
are allowed,
behavior is undefined
when the value is not formed this expected way.
Requesting both
Acquire
and
Release
semantics is done by setting the
AcquireRelease
bit, not by setting two bits.
Memory semantics define memory-order constraints, and on what storage classes those constraints apply to. The memory order constrains the allowed orders in which memory operations in this
invocation
are made visible to another invocation. The storage classes specify to which subsets of memory these constraints are to be applied. Storage classes not selected are not being constrained.
Used by:
OpControlBarrier
OpMemoryBarrier
OpAtomicLoad
OpAtomicStore
OpAtomicExchange
OpAtomicCompareExchange
OpAtomicCompareExchangeWeak
OpAtomicIIncrement
OpAtomicIDecrement
OpAtomicIAdd
OpAtomicISub
OpAtomicSMin
OpAtomicUMin
OpAtomicSMax
OpAtomicUMax
OpAtomicAnd
OpAtomicOr
OpAtomicXor
OpAtomicFlagTestAndSet
OpAtomicFlagClear
OpMemoryNamedBarrier
OpAtomicFMinEXT
OpAtomicFMaxEXT
OpAtomicFAddEXT
OpControlBarrierArriveINTEL
OpControlBarrierWaitINTEL
Memory Semantics
Enabling Capabilities
0x0
None (Relaxed)
0x2
Acquire
On an atomic instruction, orders memory operations provided in program order after this atomic instruction against this atomic instruction. On a barrier, orders memory operations provided in program order after this barrier against atomic instructions before this barrier. See the client API specification for more detail.
0x4
Release
On an atomic instruction, orders memory operations provided in program order before this atomic instruction against this atomic instruction. On a barrier, orders memory operations provided in program order before this barrier against atomic instructions after this barrier. See the client API specification for more detail.
0x8
AcquireRelease
Has the properties of both
Acquire
and
Release
semantics. It is used for read-modify-write operations.
0x10
SequentiallyConsistent
All observers see this memory access in the same order with respect to other sequentially-consistent memory accesses from this
invocation
If the declared
memory model
is
Vulkan
SequentiallyConsistent
must not be used.
0x40
UniformMemory
Apply the memory-ordering constraints to
StorageBuffer
PhysicalStorageBuffer
, or
Uniform
Storage Class
memory.
Shader
0x80
SubgroupMemory
Apply the memory-ordering constraints to subgroup memory.
0x100
WorkgroupMemory
Apply the memory-ordering constraints to
Workgroup
Storage Class
memory.
0x200
CrossWorkgroupMemory
Apply the memory-ordering constraints to
CrossWorkgroup
Storage Class
memory.
0x400
AtomicCounterMemory
Apply the memory-ordering constraints to
AtomicCounter
Storage Class
memory.
AtomicStorage
0x800
ImageMemory
Apply the memory-ordering constraints to image contents (types declared by
OpTypeImage
), or to accesses done through pointers to the
Image
Storage Class
0x1000
OutputMemory (OutputMemoryKHR)
Apply the memory-ordering constraints to
Output
storage class
memory.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x2000
MakeAvailable (MakeAvailableKHR)
Perform an availability operation on all references in the selected
storage classes
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x4000
MakeVisible (MakeVisibleKHR)
Perform a visibility operation on all references in the selected
storage classes
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x8000
Volatile
This access cannot be eliminated, duplicated, or combined with other accesses.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
3.2.25. Memory Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Provides additional operands to the listed memory instructions. Bits that are set indicate whether an additional operand follows, as described by the table. If there are multiple following operands indicated, they are ordered: Those indicated by smaller-numbered bits appear first. An instruction needing two masks must first provide the first mask followed by the first mask’s additional operands, and then provide the second mask followed by the second mask’s additional operands.
Used by:
OpLoad
OpStore
OpCopyMemory
OpCopyMemorySized
OpUntypedGroupAsyncCopyKHR
OpCooperativeMatrixLoadKHR
OpCooperativeMatrixStoreKHR
OpCooperativeVectorLoadNV
OpCooperativeVectorStoreNV
OpCooperativeMatrixLoadNV
OpCooperativeMatrixStoreNV
OpCooperativeMatrixLoadTensorNV
OpCooperativeMatrixStoreTensorNV
OpSubgroupBlockPrefetchINTEL
Memory Operands
Enabling Capabilities
0x0
None
0x1
Volatile
This access cannot be eliminated, duplicated, or combined with other accesses.
0x2
Aligned
This access has a known alignment. The alignment is specified in a subsequent unsigned 32-bit integer literal operand. The value must be a power of two. Valid values are defined by the execution environment.
0x4
Nontemporal
Hints that the accessed address is not likely to be accessed again in the near future.
0x8
MakePointerAvailable (MakePointerAvailableKHR)
Perform an availability operation on the locations pointed to by the pointer operand, after a store. A following operand is the memory
scope
for the availability operation. Requires
NonPrivatePointer
to also be set. Only valid with instructions writing memory.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x10
MakePointerVisible (MakePointerVisibleKHR)
Perform a visibility operation on the locations pointed to by the pointer operand, before a load. A following operand is the memory
scope
for the visibility operation. Requires
NonPrivatePointer
to also be set. Only valid with instructions reading memory.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x20
NonPrivatePointer (NonPrivatePointerKHR)
The memory access obeys inter-thread ordering, as specified by the client API.
VulkanMemoryModel
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
0x10000
AliasScopeINTELMask
MemoryAccessAliasingINTEL
Reserved
Also see extension:
SPV_INTEL_memory_access_aliasing
0x20000
NoAliasINTELMask
MemoryAccessAliasingINTEL
Reserved
Also see extension:
SPV_INTEL_memory_access_aliasing
3.2.26. Scope
Must be an
of a 32-bit integer scalar. Its value is expected to be one of the values in the table below. If validation rules or the client API require a constant
, it is invalid for it to not be one of these values. If non-constant
are allowed,
behavior is undefined
if
is not one of these values.
If labeled as a memory scope, it specifies the distance of synchronization from the current
invocation
. If labeled as an execution scope, it specifies the set of executing invocations taking part in the operation. Other usages (neither memory nor execution) of scope are possible, and each such usage defines what scope means in its context.
Used by:
OpControlBarrier
OpMemoryBarrier
OpAtomicLoad
OpAtomicStore
OpAtomicExchange
OpAtomicCompareExchange
OpAtomicCompareExchangeWeak
OpAtomicIIncrement
OpAtomicIDecrement
OpAtomicIAdd
OpAtomicISub
OpAtomicSMin
OpAtomicUMin
OpAtomicSMax
OpAtomicUMax
OpAtomicAnd
OpAtomicOr
OpAtomicXor
OpGroupAsyncCopy
OpGroupWaitEvents
OpGroupAll
OpGroupAny
OpGroupBroadcast
OpGroupIAdd
OpGroupFAdd
OpGroupFMin
OpGroupUMin
OpGroupSMin
OpGroupFMax
OpGroupUMax
OpGroupSMax
OpGroupReserveReadPipePackets
OpGroupReserveWritePipePackets
OpGroupCommitReadPipe
OpGroupCommitWritePipe
OpAtomicFlagTestAndSet
OpAtomicFlagClear
OpMemoryNamedBarrier
OpGroupNonUniformElect
OpGroupNonUniformAll
OpGroupNonUniformAny
OpGroupNonUniformAllEqual
OpGroupNonUniformBroadcast
OpGroupNonUniformBroadcastFirst
OpGroupNonUniformBallot
OpGroupNonUniformInverseBallot
OpGroupNonUniformBallotBitExtract
OpGroupNonUniformBallotBitCount
OpGroupNonUniformBallotFindLSB
OpGroupNonUniformBallotFindMSB
OpGroupNonUniformShuffle
OpGroupNonUniformShuffleXor
OpGroupNonUniformShuffleUp
OpGroupNonUniformShuffleDown
OpGroupNonUniformIAdd
OpGroupNonUniformFAdd
OpGroupNonUniformIMul
OpGroupNonUniformFMul
OpGroupNonUniformSMin
OpGroupNonUniformUMin
OpGroupNonUniformFMin
OpGroupNonUniformSMax
OpGroupNonUniformUMax
OpGroupNonUniformFMax
OpGroupNonUniformBitwiseAnd
OpGroupNonUniformBitwiseOr
OpGroupNonUniformBitwiseXor
OpGroupNonUniformLogicalAnd
OpGroupNonUniformLogicalOr
OpGroupNonUniformLogicalXor
OpGroupNonUniformQuadBroadcast
OpGroupNonUniformQuadSwap
OpGroupNonUniformRotateKHR
OpTypeCooperativeMatrixKHR
OpGroupIAddNonUniformAMD
OpGroupFAddNonUniformAMD
OpGroupFMinNonUniformAMD
OpGroupUMinNonUniformAMD
OpGroupSMinNonUniformAMD
OpGroupFMaxNonUniformAMD
OpGroupUMaxNonUniformAMD
OpGroupSMaxNonUniformAMD
OpReadClockKHR
OpAllocateNodePayloadsAMDX
OpTypeCooperativeMatrixNV
OpAtomicFMinEXT
OpAtomicFMaxEXT
OpAtomicFAddEXT
OpControlBarrierArriveINTEL
OpControlBarrierWaitINTEL
OpGroupIMulKHR
OpGroupFMulKHR
OpGroupBitwiseAndKHR
OpGroupBitwiseOrKHR
OpGroupBitwiseXorKHR
OpGroupLogicalAndKHR
OpGroupLogicalOrKHR
OpGroupLogicalXorKHR
Scope
Enabling Capabilities
CrossDevice
Scope crosses multiple devices.
Device
Scope is the current device.
Workgroup
Scope is the current
workgroup
Subgroup
Scope is the current
subgroup
Invocation
Scope is the current
Invocation
QueueFamily (QueueFamilyKHR)
Scope is the current queue family.
VulkanMemoryModel
Missing before
version 1.5
ShaderCallKHR
RayTracingKHR
Reserved
3.2.27. Group Operation
Defines the class of operation for
group
and
non-uniform group
instructions.
Used by:
OpGroupIAdd
OpGroupFAdd
OpGroupFMin
OpGroupUMin
OpGroupSMin
OpGroupFMax
OpGroupUMax
OpGroupSMax
OpGroupNonUniformBallotBitCount
OpGroupNonUniformIAdd
OpGroupNonUniformFAdd
OpGroupNonUniformIMul
OpGroupNonUniformFMul
OpGroupNonUniformSMin
OpGroupNonUniformUMin
OpGroupNonUniformFMin
OpGroupNonUniformSMax
OpGroupNonUniformUMax
OpGroupNonUniformFMax
OpGroupNonUniformBitwiseAnd
OpGroupNonUniformBitwiseOr
OpGroupNonUniformBitwiseXor
OpGroupNonUniformLogicalAnd
OpGroupNonUniformLogicalOr
OpGroupNonUniformLogicalXor
OpGroupIAddNonUniformAMD
OpGroupFAddNonUniformAMD
OpGroupFMinNonUniformAMD
OpGroupUMinNonUniformAMD
OpGroupSMinNonUniformAMD
OpGroupFMaxNonUniformAMD
OpGroupUMaxNonUniformAMD
OpGroupSMaxNonUniformAMD
OpGroupIMulKHR
OpGroupFMulKHR
OpGroupBitwiseAndKHR
OpGroupBitwiseOrKHR
OpGroupBitwiseXorKHR
OpGroupLogicalAndKHR
OpGroupLogicalOrKHR
OpGroupLogicalXorKHR
Group Operation
Enabling Capabilities
Reduce
A reduction operation for all values of a specific value X specified by
invocations
within a workgroup.
Kernel
GroupNonUniformArithmetic
GroupNonUniformBallot
InclusiveScan
A binary operation with an identity
and
(where
is the size of the workgroup) elements[
, …
n-1
] resulting in [
, (
op
), …(
op
op … op
n-1
)]
Kernel
GroupNonUniformArithmetic
GroupNonUniformBallot
ExclusiveScan
A binary operation with an identity
and
(where
is the size of the workgroup) elements[
, …
n-1
] resulting in [
, (
op
), … (
op
op … op
n-2
)].
Kernel
GroupNonUniformArithmetic
GroupNonUniformBallot
ClusteredReduce
GroupNonUniformClustered
Missing before
version 1.3
PartitionedReduceEXT (PartitionedReduceNV)
GroupNonUniformPartitionedEXT
Reserved
PartitionedInclusiveScanEXT (PartitionedInclusiveScanNV)
GroupNonUniformPartitionedEXT
Reserved
PartitionedExclusiveScanEXT (PartitionedExclusiveScanNV)
GroupNonUniformPartitionedEXT
Reserved
3.2.28. Kernel Enqueue Flags
Specify when the child kernel begins execution.
Note:
Implementations are not required to honor this flag. Implementations may not schedule kernel launch earlier than the point specified by this flag, however. Used by
OpEnqueueKernel
Kernel Enqueue Flags
Enabling Capabilities
NoWait
Indicates that the enqueued kernels do not need to wait for the parent kernel to finish execution before they begin execution.
Kernel
WaitKernel
Indicates that all invocations of the parent kernel finish executing and all immediate side effects are committed before the enqueued child kernel begins execution.
Note:
Immediate meaning not side effects resulting from child kernels. The side effects would include stores to global memory and pipe reads and writes.
Kernel
WaitWorkGroup
Indicates that the enqueued kernels wait only for the workgroup that enqueued the kernels to finish before they begin execution.
Note:
This acts as a memory synchronization point between invocations in a workgroup and child kernels enqueued by invocations in the workgroup.
Kernel
3.2.29. Kernel Profiling Info
The
's value is a mask; it can be formed by combining the bits from multiple rows in the table below.
Specifies the profiling information to be queried. Used by
OpCaptureEventProfilingInfo
Kernel Profiling Info
Enabling Capabilities
0x0
None
0x1
CmdExecTime
Indicates that the profiling info queried is the execution time.
Kernel
3.2.30. Capability
Capabilities a module can declare it uses.
All used capabilities need to be declared, either explicitly with
OpCapability
or implicitly through the
Implicitly Declares
column: If a capability defined with
statically expressed rules
is used, it is invalid to not declare it. If a capability defined in terms of dynamic behavior is used,
behavior is undefined
unless the capability is declared. The
Implicitly Declares
column lists additional capabilities that are all implicitly declared when the
Capability
entry is explicitly or implicitly declared. It is not necessary, but allowed, to explicitly declare an implicitly declared capability.
See the
capabilities
section for more detail.
Used by
OpCapability
OpConditionalCapabilityINTEL
, and
OpSpecConstantCapabilitiesINTEL
Capability
Implicitly Declares
Matrix
Uses
OpTypeMatrix
Shader
Uses
Vertex
Fragment
, or
GLCompute
Execution Models
Matrix
Geometry
Uses the
Geometry
Execution Model
Shader
Tessellation
Uses the
TessellationControl
or
TessellationEvaluation
Execution Models
Shader
Addresses
Uses physical addressing, non-logical addressing modes.
Linkage
Uses partially linked modules and libraries.
Kernel
Uses the
Kernel
Execution Model
Vector16
Uses
OpTypeVector
to declare 8 component or 16 component vectors.
Kernel
Float16Buffer
Allows a 16-bit
OpTypeFloat
instruction using the IEEE 754 encoding for creating an
OpTypePointer
to a 16-bit float. Pointers to a 16-bit float must not be dereferenced, unless specifically allowed by a specific instruction. All other uses of 16-bit
OpTypeFloat
are disallowed.
Kernel
Float16
Uses
OpTypeFloat
to declare the 16-bit floating-point type using the IEEE 754 encoding.
10
Float64
Uses
OpTypeFloat
to declare the 64-bit floating-point type using the IEEE 754 encoding.
11
Int64
Uses
OpTypeInt
to declare 64-bit integer types.
12
Int64Atomics
Uses atomic instructions on 64-bit integer types.
Int64
13
ImageBasic
Uses
OpTypeImage
or
OpTypeSampler
in a
Kernel
Kernel
14
ImageReadWrite
Uses
OpTypeImage
with the
ReadWrite
access qualifier
in a kernel.
ImageBasic
15
ImageMipmap
Uses non-zero
Lod
Image Operands
in a kernel.
ImageBasic
17
Pipes
Uses
OpTypePipe
OpTypeReserveId
or
pipe
instructions.
Kernel
18
Groups
Uses common group instructions.
Also see extension:
SPV_AMD_shader_ballot
19
DeviceEnqueue
Uses
OpTypeQueue
OpTypeDeviceEvent
, and
device side enqueue
instructions.
Kernel
20
LiteralSampler
Samplers
are made from literals within the module. See
OpConstantSampler
Kernel
21
AtomicStorage
Uses the
AtomicCounter
Storage Class
, allowing use of only the
OpAtomicLoad
OpAtomicIIncrement
, and
OpAtomicIDecrement
instructions.
Shader
22
Int16
Uses
OpTypeInt
to declare 16-bit integer types.
23
TessellationPointSize
Tessellation stage exports point size.
Tessellation
24
GeometryPointSize
Geometry stage exports point size
Geometry
25
ImageGatherExtended
Uses texture gather with non-constant or independent offsets
Shader
27
StorageImageMultisample
An
MS
operand in
OpTypeImage
indicates multisampled, used with an
OpTypeImage
having
Sampled
== 2.
Shader
28
UniformBufferArrayDynamicIndexing
Block
-decorated arrays in uniform storage classes use
dynamically uniform
indexing.
Shader
29
SampledImageArrayDynamicIndexing
Arrays of sampled images, samplers, or images with
Sampled
= 0 or 1 use
dynamically uniform
indexing.
Shader
30
StorageBufferArrayDynamicIndexing
Arrays in the
StorageBuffer
Storage Class
, or
BufferBlock
-decorated arrays, use
dynamically uniform
indexing.
Shader
31
StorageImageArrayDynamicIndexing
Arrays of images with
Sampled
= 2 are accessed with
dynamically uniform
indexing.
Shader
32
ClipDistance
Uses the
ClipDistance
BuiltIn
Shader
33
CullDistance
Uses the
CullDistance
BuiltIn
Shader
34
ImageCubeArray
Uses the
Cube
Dim
with the
Arrayed
operand in
OpTypeImage
, with an
OpTypeImage
having
Sampled
== 2.
SampledCubeArray
35
SampleRateShading
Uses per-sample rate shading.
Shader
36
ImageRect
Uses the
Rect
Dim
with an
OpTypeImage
having
Sampled
== 2.
SampledRect
37
SampledRect
Uses the
Rect
Dim
with an
OpTypeImage
having
Sampled
== 0 or 1.
Shader
38
GenericPointer
Uses the
Generic
Storage Class
Addresses
39
Int8
Uses
OpTypeInt
to declare 8-bit integer types.
40
InputAttachment
Uses the
SubpassData
Dim
Shader
41
SparseResidency
Uses
OpImageSparse…
instructions.
Shader
42
MinLod
Uses the
MinLod
Image Operand
Shader
43
Sampled1D
Uses the
1D
Dim
with an
OpTypeImage
having
Sampled
== 0 or 1.
44
Image1D
Uses the
1D
Dim
with an
OpTypeImage
having
Sampled
== 2.
Sampled1D
45
SampledCubeArray
Uses the
Cube
Dim
with the
Arrayed
operand in
OpTypeImage
, with an
OpTypeImage
having
Sampled
== 0 or 1.
Shader
46
SampledBuffer
Uses the
Buffer
Dim
with an
OpTypeImage
having
Sampled
== 0 or 1.
47
ImageBuffer
Uses the
Buffer
Dim
with an
OpTypeImage
having
Sampled
== 2.
SampledBuffer
48
ImageMSArray
An
MS
operand in
OpTypeImage
indicates multisampled, used with an
OpTypeImage
having
Sampled
== 2 and
Arrayed
== 1.
Shader
49
StorageImageExtendedFormats
One of a large set of more advanced image formats are used, namely one of those in the
Image Format
table listed as requiring this capability.
Shader
50
ImageQuery
The sizes, number of samples, or lod, etc. are queried.
Shader
51
DerivativeControl
Uses fine or coarse-grained derivatives, e.g.,
OpDPdxFine
Shader
52
InterpolationFunction
Uses one of the
InterpolateAtCentroid
InterpolateAtSample
, or
InterpolateAtOffset
GLSL.std.450 extended instructions.
Shader
53
TransformFeedback
Uses the
Xfb
Execution Mode
Shader
54
GeometryStreams
Uses multiple numbered streams for geometry-stage output.
Geometry
55
StorageImageReadWithoutFormat
OpImageRead
can use the
Unknown
Image Format
Shader
56
StorageImageWriteWithoutFormat
OpImageWrite
can use the
Unknown
Image Format
Shader
57
MultiViewport
Multiple viewports are used.
Geometry
58
SubgroupDispatch
Uses subgroup dispatch instructions.
DeviceEnqueue
Missing before
version 1.1
59
NamedBarrier
Uses
OpTypeNamedBarrier
Kernel
Missing before
version 1.1
60
PipeStorage
Uses
OpTypePipeStorage
Pipes
Missing before
version 1.1
61
GroupNonUniform
Missing before
version 1.3
62
GroupNonUniformVote
GroupNonUniform
Missing before
version 1.3
63
GroupNonUniformArithmetic
GroupNonUniform
Missing before
version 1.3
64
GroupNonUniformBallot
GroupNonUniform
Missing before
version 1.3
65
GroupNonUniformShuffle
GroupNonUniform
Missing before
version 1.3
66
GroupNonUniformShuffleRelative
GroupNonUniform
Missing before
version 1.3
67
GroupNonUniformClustered
GroupNonUniform
Missing before
version 1.3
68
GroupNonUniformQuad
GroupNonUniform
Missing before
version 1.3
69
ShaderLayer
Missing before
version 1.5
70
ShaderViewportIndex
Missing before
version 1.5
71
UniformDecoration
Uses the
Uniform
or
UniformId
decoration
Missing before
version 1.6
4165
CoreBuiltinsARM
Reserved
Also see extension:
SPV_ARM_core_builtins
4166
TileImageColorReadAccessEXT
Reserved
Also see extension:
SPV_EXT_shader_tile_image
4167
TileImageDepthReadAccessEXT
Reserved
Also see extension:
SPV_EXT_shader_tile_image
4168
TileImageStencilReadAccessEXT
Reserved
Also see extension:
SPV_EXT_shader_tile_image
4174
TensorsARM
Reserved
Also see extension:
SPV_ARM_tensors
4175
StorageTensorArrayDynamicIndexingARM
Reserved
Also see extension:
SPV_ARM_tensors
4176
StorageTensorArrayNonUniformIndexingARM
Reserved
Also see extension:
SPV_ARM_tensors
4191
GraphARM
Reserved
Also see extension:
SPV_ARM_graph
4201
CooperativeMatrixLayoutsARM
Reserved
Also see extension:
SPV_ARM_cooperative_matrix_layouts
4212
Float8EXT
Reserved
Also see extension:
SPV_EXT_float8
4213
Float8CooperativeMatrixEXT
Float8EXT
CooperativeMatrixKHR
Reserved
Also see extension:
SPV_EXT_float8
4422
FragmentShadingRateKHR
Shader
Reserved
Also see extension:
SPV_KHR_fragment_shading_rate
4423
SubgroupBallotKHR
Reserved
Also see extension:
SPV_KHR_shader_ballot
4427
DrawParameters
Shader
Missing before
version 1.3
Also see extension:
SPV_KHR_shader_draw_parameters
4428
WorkgroupMemoryExplicitLayoutKHR
Shader
Reserved
Also see extension:
SPV_KHR_workgroup_memory_explicit_layout
4429
WorkgroupMemoryExplicitLayout8BitAccessKHR
WorkgroupMemoryExplicitLayoutKHR
Reserved
Also see extension:
SPV_KHR_workgroup_memory_explicit_layout
4430
WorkgroupMemoryExplicitLayout16BitAccessKHR
WorkgroupMemoryExplicitLayoutKHR
Reserved
Also see extension:
SPV_KHR_workgroup_memory_explicit_layout
4431
SubgroupVoteKHR
Reserved
Also see extension:
SPV_KHR_subgroup_vote
4433
StorageBuffer16BitAccess (StorageUniformBufferBlock16)
Uses 16-bit
OpTypeFloat
and
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
StorageBuffer
storage class
, the
PhysicalStorageBuffer
storage class, or the
Uniform
storage class with the
BufferBlock
decoration
Missing before
version 1.3
Also see extension:
SPV_KHR_16bit_storage
4434
UniformAndStorageBuffer16BitAccess (StorageUniform16)
Uses 16-bit
OpTypeFloat
and
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
StorageBuffer
storage class
, the
PhysicalStorageBuffer
storage class, or the
Uniform
storage class.
StorageBuffer16BitAccess
Missing before
version 1.3
Also see extension:
SPV_KHR_16bit_storage
4435
StoragePushConstant16
Uses 16-bit
OpTypeFloat
and
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
PushConstant
storage class
Missing before
version 1.3
Also see extension:
SPV_KHR_16bit_storage
4436
StorageInputOutput16
Uses 16-bit
OpTypeFloat
and
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
Output
storage class
Missing before
version 1.3
Also see extension:
SPV_KHR_16bit_storage
4437
DeviceGroup
Missing before
version 1.3
Also see extension:
SPV_KHR_device_group
4439
MultiView
Shader
Missing before
version 1.3
Also see extension:
SPV_KHR_multiview
4441
VariablePointersStorageBuffer
Allow
variable pointers
, each confined to a single
Block
-decorated struct in the
StorageBuffer
storage class.
Shader
Missing before
version 1.3
Also see extension:
SPV_KHR_variable_pointers
4442
VariablePointers
Allow
variable pointers
VariablePointersStorageBuffer
Missing before
version 1.3
Also see extension:
SPV_KHR_variable_pointers
4445
AtomicStorageOps
AtomicStorage
Reserved
Also see extension:
SPV_KHR_shader_atomic_counter_ops
4447
SampleMaskPostDepthCoverage
Reserved
Also see extension:
SPV_KHR_post_depth_coverage
4448
StorageBuffer8BitAccess
Uses 8-bit
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
StorageBuffer
storage class
or the
PhysicalStorageBuffer
storage class.
Missing before
version 1.5
Also see extension:
SPV_KHR_8bit_storage
4449
UniformAndStorageBuffer8BitAccess
Uses 8-bit
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
StorageBuffer
storage class
, the
PhysicalStorageBuffer
storage class, or the
Uniform
storage class.
StorageBuffer8BitAccess
Missing before
version 1.5
Also see extension:
SPV_KHR_8bit_storage
4450
StoragePushConstant8
Uses 8-bit
OpTypeInt
instructions for creating scalar, vector, and composite types that become members of a block residing in the
PushConstant
storage class
Missing before
version 1.5
Also see extension:
SPV_KHR_8bit_storage
4464
DenormPreserve
Uses the
DenormPreserve
execution mode
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4465
DenormFlushToZero
Uses the
DenormFlushToZero
execution mode
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4466
SignedZeroInfNanPreserve
Uses the
SignedZeroInfNanPreserve
execution mode
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4467
RoundingModeRTE
Uses the
RoundingModeRTE
execution mode
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4468
RoundingModeRTZ
Uses the
RoundingModeRTZ
execution mode
Missing before
version 1.4
Also see extension:
SPV_KHR_float_controls
4471
RayQueryProvisionalKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_query
4472
RayQueryKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_query
4473
UntypedPointersKHR
Reserved
Also see extension:
SPV_KHR_untyped_pointers
4478
RayTraversalPrimitiveCullingKHR
RayQueryKHR
RayTracingKHR
Reserved
Also see extensions:
SPV_KHR_ray_query
SPV_KHR_ray_tracing
4479
RayTracingKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_tracing
4484
TextureSampleWeightedQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing
4485
TextureBoxFilterQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing
4486
TextureBlockMatchQCOM
Reserved
Also see extension:
SPV_QCOM_image_processing
4495
TileShadingQCOM
Shader
Reserved
Also see extension:
SPV_QCOM_tile_shading
4496
CooperativeMatrixConversionQCOM
CooperativeMatrixKHR
Reserved
Also see extension:
SPV_QCOM_cooperative_matrix_conversion
4498
TextureBlockMatch2QCOM
Reserved
Also see extension:
SPV_QCOM_image_processing2
5008
Float16ImageAMD
Shader
Reserved
Also see extension:
SPV_AMD_gpu_shader_half_float_fetch
5009
ImageGatherBiasLodAMD
Shader
Reserved
Also see extension:
SPV_AMD_texture_gather_bias_lod
5010
FragmentMaskAMD
Shader
Reserved
Also see extension:
SPV_AMD_shader_fragment_mask
5013
StencilExportEXT
Shader
Reserved
Also see extension:
SPV_EXT_shader_stencil_export
5015
ImageReadWriteLodAMD
Shader
Reserved
Also see extension:
SPV_AMD_shader_image_load_store_lod
5016
Int64ImageEXT
Shader
Reserved
Also see extension:
SPV_EXT_shader_image_int64
5055
ShaderClockKHR
Reserved
Also see extension:
SPV_KHR_shader_clock
5067
ShaderEnqueueAMDX
Shader
Reserved
Also see extension:
SPV_AMDX_shader_enqueue
5087
QuadControlKHR
Reserved
Also see extension:
SPV_KHR_quad_control
5112
Int4TypeINTEL
Reserved
Also see extension:
SPV_INTEL_int4
5114
Int4CooperativeMatrixINTEL
Int4TypeINTEL
CooperativeMatrixKHR
Reserved
Also see extension:
SPV_INTEL_int4
5116
BFloat16TypeKHR
Reserved
Also see extension:
SPV_KHR_bfloat16
5117
BFloat16DotProductKHR
BFloat16TypeKHR
Reserved
Also see extension:
SPV_KHR_bfloat16
5118
BFloat16CooperativeMatrixKHR
BFloat16TypeKHR
CooperativeMatrixKHR
Reserved
Also see extension:
SPV_KHR_bfloat16
5128
DescriptorHeapEXT
UntypedPointersKHR
Reserved
Also see extension:
SPV_EXT_descriptor_heap
5249
SampleMaskOverrideCoverageNV
SampleRateShading
Reserved
Also see extension:
SPV_NV_sample_mask_override_coverage
5251
GeometryShaderPassthroughNV
Geometry
Reserved
Also see extension:
SPV_NV_geometry_shader_passthrough
5254
ShaderViewportIndexLayerEXT (ShaderViewportIndexLayerNV)
MultiViewport
Reserved
Also see extensions:
SPV_EXT_shader_viewport_index_layer
SPV_NV_viewport_array2
5255
ShaderViewportMaskNV
ShaderViewportIndexLayerEXT
Reserved
Also see extension:
SPV_NV_viewport_array2
5259
ShaderStereoViewNV
ShaderViewportMaskNV
Reserved
Also see extension:
SPV_NV_stereo_view_rendering
5260
PerViewAttributesNV
MultiView
Reserved
Also see extension:
SPV_NVX_multiview_per_view_attributes
5265
FragmentFullyCoveredEXT
Shader
Reserved
Also see extension:
SPV_EXT_fragment_fully_covered
5266
MeshShadingNV
Shader
Reserved
Also see extension:
SPV_NV_mesh_shader
5282
ImageFootprintNV
Reserved
Also see extension:
SPV_NV_shader_image_footprint
5283
MeshShadingEXT
Shader
Reserved
Also see extension:
SPV_EXT_mesh_shader
5284
FragmentBarycentricKHR (FragmentBarycentricNV)
Reserved
Also see extensions:
SPV_NV_fragment_shader_barycentric
SPV_KHR_fragment_shader_barycentric
5288
ComputeDerivativeGroupQuadsKHR (ComputeDerivativeGroupQuadsNV)
Shader
Reserved
Also see extensions:
SPV_NV_compute_shader_derivatives
SPV_KHR_compute_shader_derivatives
5291
FragmentDensityEXT (ShadingRateNV)
Shader
Reserved
Also see extensions:
SPV_EXT_fragment_invocation_density
SPV_NV_shading_rate
5297
GroupNonUniformPartitionedEXT (GroupNonUniformPartitionedNV)
Reserved
Also see extensions:
SPV_NV_shader_subgroup_partitioned
SPV_EXT_shader_subgroup_partitioned
5301
ShaderNonUniform (ShaderNonUniformEXT)
Uses the
NonUniform
decoration
on a variable or instruction.
Shader
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5302
RuntimeDescriptorArray (RuntimeDescriptorArrayEXT)
Uses arrays of resources which are sized at run-time.
Shader
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5303
InputAttachmentArrayDynamicIndexing (InputAttachmentArrayDynamicIndexingEXT)
Arrays of
InputAttachment
s use
dynamically uniform
indexing.
InputAttachment
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5304
UniformTexelBufferArrayDynamicIndexing (UniformTexelBufferArrayDynamicIndexingEXT)
Arrays of
SampledBuffer
s use
dynamically uniform
indexing.
SampledBuffer
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5305
StorageTexelBufferArrayDynamicIndexing (StorageTexelBufferArrayDynamicIndexingEXT)
Arrays of
ImageBuffer
s use
dynamically uniform
indexing.
ImageBuffer
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5306
UniformBufferArrayNonUniformIndexing (UniformBufferArrayNonUniformIndexingEXT)
Block
decorated
arrays in uniform storage classes use
non-uniform
indexing.
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5307
SampledImageArrayNonUniformIndexing (SampledImageArrayNonUniformIndexingEXT)
Arrays of sampled images use
non-uniform
indexing.
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5308
StorageBufferArrayNonUniformIndexing (StorageBufferArrayNonUniformIndexingEXT)
Arrays in the
StorageBuffer
storage class
or
BufferBlock
decorated
arrays use
non-uniform
indexing.
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5309
StorageImageArrayNonUniformIndexing (StorageImageArrayNonUniformIndexingEXT)
Arrays of non-sampled images use
non-uniform
indexing.
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5310
InputAttachmentArrayNonUniformIndexing (InputAttachmentArrayNonUniformIndexingEXT)
Arrays of
InputAttachment
s use
non-uniform
indexing.
InputAttachment
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5311
UniformTexelBufferArrayNonUniformIndexing (UniformTexelBufferArrayNonUniformIndexingEXT)
Arrays of
SampledBuffer
s use
non-uniform
indexing.
SampledBuffer
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5312
StorageTexelBufferArrayNonUniformIndexing (StorageTexelBufferArrayNonUniformIndexingEXT)
Arrays of
ImageBuffer
s use
non-uniform
indexing.
ImageBuffer
ShaderNonUniform
Missing before
version 1.5
Also see extension:
SPV_EXT_descriptor_indexing
5336
RayTracingPositionFetchKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_tracing_position_fetch
5340
RayTracingNV
Shader
Reserved
Also see extension:
SPV_NV_ray_tracing
5341
RayTracingMotionBlurNV
Shader
Reserved
Also see extension:
SPV_NV_ray_tracing_motion_blur
5345
VulkanMemoryModel (VulkanMemoryModelKHR)
Uses the
Vulkan
memory model
. This capability must be declared if and only if the
Vulkan
memory model is declared.
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
5346
VulkanMemoryModelDeviceScope (VulkanMemoryModelDeviceScopeKHR)
Uses
Device
scope
with any instruction when the
Vulkan
memory model
is declared.
Missing before
version 1.5
Also see extension:
SPV_KHR_vulkan_memory_model
5347
PhysicalStorageBufferAddresses (PhysicalStorageBufferAddressesEXT)
Uses physical addressing on storage buffers.
Shader
Missing before
version 1.5
Also see extensions:
SPV_EXT_physical_storage_buffer
SPV_KHR_physical_storage_buffer
5350
ComputeDerivativeGroupLinearKHR (ComputeDerivativeGroupLinearNV)
Shader
Reserved
Also see extensions:
SPV_NV_compute_shader_derivatives
SPV_KHR_compute_shader_derivatives
5353
RayTracingProvisionalKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_tracing
5357
CooperativeMatrixNV
Shader
Reserved
Also see extension:
SPV_NV_cooperative_matrix
5363
FragmentShaderSampleInterlockEXT
Shader
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5372
FragmentShaderShadingRateInterlockEXT
Shader
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5373
ShaderSMBuiltinsNV
Shader
Reserved
Also see extension:
SPV_NV_shader_sm_builtins
5378
FragmentShaderPixelInterlockEXT
Shader
Reserved
Also see extension:
SPV_EXT_fragment_shader_interlock
5379
DemoteToHelperInvocation (DemoteToHelperInvocationEXT)
Shader
Missing before
version 1.6
Also see extension:
SPV_EXT_demote_to_helper_invocation
5380
DisplacementMicromapNV
Shader
Reserved
Also see extension:
SPV_NV_displacement_micromap
5381
RayTracingOpacityMicromapEXT
Shader
Reserved
Also see extension:
SPV_EXT_opacity_micromap
5383
ShaderInvocationReorderNV
RayTracingKHR
Reserved
Also see extension:
SPV_NV_shader_invocation_reorder
5388
ShaderInvocationReorderEXT
RayTracingKHR
Reserved
Also see extension:
SPV_EXT_shader_invocation_reorder
5390
BindlessTextureNV
Reserved
Also see extension:
SPV_NV_bindless_texture
5391
RayQueryPositionFetchKHR
Shader
Reserved
Also see extension:
SPV_KHR_ray_tracing_position_fetch
5394
CooperativeVectorNV
Reserved
Also see extension:
SPV_NV_cooperative_vector
5404
AtomicFloat16VectorNV
Reserved
Also see extension:
SPV_NV_shader_atomic_fp16_vector
5409
RayTracingDisplacementMicromapNV
RayTracingKHR
Reserved
Also see extension:
SPV_NV_displacement_micromap
5414
RawAccessChainsNV
Reserved
Also see extension:
SPV_NV_raw_access_chains
5418
RayTracingSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5419
RayTracingLinearSweptSpheresGeometryNV
Reserved
Also see extension:
SPV_NV_linear_swept_spheres
5423
PushConstantBanksNV
Shader
Reserved
Also see extension:
SPV_NV_push_constant_bank
5425
LongVectorEXT
Reserved
Also see extension:
SPV_EXT_long_vector
5426
Shader64BitIndexingEXT
Reserved
Also see extension:
SPV_EXT_shader_64bit_indexing
5430
CooperativeMatrixReductionsNV
Reserved
Also see extension:
SPV_NV_cooperative_matrix2
5431
CooperativeMatrixConversionsNV
Reserved
Also see extension:
SPV_NV_cooperative_matrix2
5432
CooperativeMatrixPerElementOperationsNV
Reserved
Also see extension:
SPV_NV_cooperative_matrix2
5433
CooperativeMatrixTensorAddressingNV
Reserved
Also see extension:
SPV_NV_cooperative_matrix2
5434
CooperativeMatrixBlockLoadsNV
Reserved
Also see extension:
SPV_NV_cooperative_matrix2
5435
CooperativeVectorTrainingNV
Reserved
Also see extension:
SPV_NV_cooperative_vector
5437
RayTracingClusterAccelerationStructureNV
RayTracingKHR
Reserved
Also see extension:
SPV_NV_cluster_acceleration_structure
5439
TensorAddressingNV
Reserved
Also see extension:
SPV_NV_tensor_addressing
5568
SubgroupShuffleINTEL
Reserved
Also see extension:
SPV_INTEL_subgroups
5569
SubgroupBufferBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_subgroups
5570
SubgroupImageBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_subgroups
5579
SubgroupImageMediaBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_media_block_io
5582
RoundToInfinityINTEL
Reserved
Also see extension:
SPV_INTEL_float_controls2
5583
FloatingPointModeINTEL
Reserved
Also see extension:
SPV_INTEL_float_controls2
5584
IntegerFunctions2INTEL
Reserved
Also see extension:
SPV_INTEL_shader_integer_functions2
5603
FunctionPointersINTEL
Reserved
Also see extension:
SPV_INTEL_function_pointers
5604
IndirectReferencesINTEL
Reserved
Also see extension:
SPV_INTEL_function_pointers
5606
AsmINTEL
Reserved
Also see extension:
SPV_INTEL_inline_assembly
5612
AtomicFloat32MinMaxEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float_min_max
5613
AtomicFloat64MinMaxEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float_min_max
5616
AtomicFloat16MinMaxEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float_min_max
5617
VectorComputeINTEL
VectorAnyINTEL
Reserved
Also see extension:
SPV_INTEL_vector_compute
5619
VectorAnyINTEL
Reserved
Also see extension:
SPV_INTEL_vector_compute
5629
ExpectAssumeKHR
Reserved
Also see extension:
SPV_KHR_expect_assume
5696
SubgroupAvcMotionEstimationINTEL
Reserved
Also see extension:
SPV_INTEL_device_side_avc_motion_estimation
5697
SubgroupAvcMotionEstimationIntraINTEL
Reserved
Also see extension:
SPV_INTEL_device_side_avc_motion_estimation
5698
SubgroupAvcMotionEstimationChromaINTEL
Reserved
Also see extension:
SPV_INTEL_device_side_avc_motion_estimation
5817
VariableLengthArrayINTEL
Reserved
Also see extension:
SPV_INTEL_variable_length_array
5821
FunctionFloatControlINTEL
Reserved
Also see extension:
SPV_INTEL_float_controls2
5824
FPGAMemoryAttributesALTERA (FPGAMemoryAttributesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_memory_attributes
SPV_INTEL_fpga_memory_attributes
5837
FPFastMathModeINTEL
Kernel
Reserved
Also see extension:
SPV_INTEL_fp_fast_math_mode
5844
ArbitraryPrecisionIntegersALTERA (ArbitraryPrecisionIntegersINTEL)
Reserved
Also see extensions:
SPV_ALTERA_arbitrary_precision_integers
SPV_INTEL_arbitrary_precision_integers
5845
ArbitraryPrecisionFloatingPointALTERA (ArbitraryPrecisionFloatingPointINTEL)
Reserved
Also see extensions:
SPV_ALTERA_arbitrary_precision_floating_point
SPV_INTEL_arbitrary_precision_floating_point
5886
UnstructuredLoopControlsINTEL
Reserved
Also see extension:
SPV_INTEL_unstructured_loop_controls
5888
FPGALoopControlsALTERA (FPGALoopControlsINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_loop_controls
SPV_INTEL_fpga_loop_controls
5892
KernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5897
FPGAKernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
5898
FPGAMemoryAccessesALTERA (FPGAMemoryAccessesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_memory_accesses
SPV_INTEL_fpga_memory_accesses
5904
FPGAClusterAttributesALTERA (FPGAClusterAttributesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_cluster_attributes
SPV_INTEL_fpga_cluster_attributes
5906
LoopFuseALTERA (LoopFuseINTEL)
Reserved
Also see extensions:
SPV_ALTERA_loop_fuse
SPV_INTEL_loop_fuse
5908
FPGADSPControlALTERA (FPGADSPControlINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_dsp_control
SPV_INTEL_fpga_dsp_control
5910
MemoryAccessAliasingINTEL
Reserved
Also see extension:
SPV_INTEL_memory_access_aliasing
5916
FPGAInvocationPipeliningAttributesALTERA (FPGAInvocationPipeliningAttributesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_invocation_pipelining_attributes
SPV_INTEL_fpga_invocation_pipelining_attributes
5920
FPGABufferLocationALTERA (FPGABufferLocationINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_buffer_location
SPV_INTEL_fpga_buffer_location
5922
ArbitraryPrecisionFixedPointALTERA (ArbitraryPrecisionFixedPointINTEL)
Reserved
Also see extensions:
SPV_ALTERA_arbitrary_precision_fixed_point
SPV_INTEL_arbitrary_precision_fixed_point
5935
USMStorageClassesALTERA (USMStorageClassesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_usm_storage_classes
SPV_INTEL_usm_storage_classes
5939
RuntimeAlignedAttributeALTERA (RuntimeAlignedAttributeINTEL)
Reserved
Also see extensions:
SPV_ALTERA_runtime_aligned
SPV_INTEL_runtime_aligned
5943
IOPipesALTERA (IOPipesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_io_pipes
SPV_INTEL_io_pipes
5945
BlockingPipesALTERA (BlockingPipesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_blocking_pipes
SPV_INTEL_blocking_pipes
5948
FPGARegALTERA (FPGARegINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_reg
SPV_INTEL_fpga_reg
6016
DotProductInputAll (DotProductInputAllKHR)
Uses vector of any integer type as input to the dot product instructions
Missing before
version 1.6
Also see extension:
SPV_KHR_integer_dot_product
6017
DotProductInput4x8Bit (DotProductInput4x8BitKHR)
Uses vectors of four components of 8-bit integer type as inputs to the dot product instructions
Int8
Missing before
version 1.6
Also see extension:
SPV_KHR_integer_dot_product
6018
DotProductInput4x8BitPacked (DotProductInput4x8BitPackedKHR)
Uses 32-bit integer scalars packing 4-component vectors of 8-bit integers as inputs to the dot product instructions
Missing before
version 1.6
Also see extension:
SPV_KHR_integer_dot_product
6019
DotProduct (DotProductKHR)
Uses dot product instructions
Missing before
version 1.6
Also see extension:
SPV_KHR_integer_dot_product
6020
RayCullMaskKHR
Reserved
Also see extension:
SPV_KHR_ray_cull_mask
6022
CooperativeMatrixKHR
Reserved
Also see extension:
SPV_KHR_cooperative_matrix
6024
ReplicatedCompositesEXT
Reserved
Also see extension:
SPV_EXT_replicated_composites
6025
BitInstructions
Reserved
Also see extension:
SPV_KHR_bit_instructions
6026
GroupNonUniformRotateKHR
GroupNonUniform
Reserved
Also see extension:
SPV_KHR_subgroup_rotate
6029
FloatControls2
Reserved
Also see extension:
SPV_KHR_float_controls2
6030
FMAKHR
Reserved
Also see extension:
SPV_KHR_fma
6033
AtomicFloat32AddEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float_add
6034
AtomicFloat64AddEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float_add
6089
LongCompositesINTEL
Reserved
Also see extension:
SPV_INTEL_long_composites
6094
OptNoneEXT (OptNoneINTEL)
Reserved
Also see extensions:
SPV_EXT_optnone
SPV_INTEL_optnone
6095
AtomicFloat16AddEXT
Reserved
Also see extension:
SPV_EXT_shader_atomic_float16_add
6114
DebugInfoModuleINTEL
Reserved
Also see extension:
SPV_INTEL_debug_module
6115
BFloat16ConversionINTEL
Reserved
Also see extension:
SPV_INTEL_bfloat16_conversion
6141
SplitBarrierINTEL
Reserved
Also see extension:
SPV_INTEL_split_barrier
6144
ArithmeticFenceEXT
Reserved
Also see extension:
SPV_EXT_arithmetic_fence
6150
FPGAClusterAttributesV2ALTERA (FPGAClusterAttributesV2INTEL)
FPGAClusterAttributesALTERA
Reserved
Also see extensions:
SPV_ALTERA_fpga_cluster_attributes
SPV_INTEL_fpga_cluster_attributes
6161
FPGAKernelAttributesv2INTEL
FPGAKernelAttributesINTEL
Reserved
Also see extension:
SPV_INTEL_kernel_attributes
6162
TaskSequenceALTERA (TaskSequenceINTEL)
Reserved
Also see extensions:
SPV_ALTERA_task_sequence
SPV_INTEL_task_sequence
6169
FPMaxErrorINTEL
Reserved
Also see extension:
SPV_INTEL_fp_max_error
6171
FPGALatencyControlALTERA (FPGALatencyControlINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_latency_control
SPV_INTEL_fpga_latency_control
6174
FPGAArgumentInterfacesALTERA (FPGAArgumentInterfacesINTEL)
Reserved
Also see extensions:
SPV_ALTERA_fpga_argument_interfaces
SPV_INTEL_fpga_argument_interfaces
6187
GlobalVariableHostAccessINTEL
Reserved
Also see extension:
SPV_INTEL_global_variable_host_access
6189
GlobalVariableFPGADecorationsALTERA (GlobalVariableFPGADecorationsINTEL)
Reserved
Also see extensions:
SPV_ALTERA_global_variable_fpga_decorations
SPV_INTEL_global_variable_fpga_decorations
6220
SubgroupBufferPrefetchINTEL
Reserved
Also see extension:
SPV_INTEL_subgroup_buffer_prefetch
6228
Subgroup2DBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_2d_block_io
6229
Subgroup2DBlockTransformINTEL
Subgroup2DBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_2d_block_io
6230
Subgroup2DBlockTransposeINTEL
Subgroup2DBlockIOINTEL
Reserved
Also see extension:
SPV_INTEL_2d_block_io
6236
SubgroupMatrixMultiplyAccumulateINTEL
Reserved
Also see extension:
SPV_INTEL_subgroup_matrix_multiply_accumulate
6241
TernaryBitwiseFunctionINTEL
Reserved
Also see extension:
SPV_INTEL_ternary_bitwise_function
6243
UntypedVariableLengthArrayINTEL
VariableLengthArrayINTEL
UntypedPointersKHR
Reserved
Also see extension:
SPV_INTEL_variable_length_array
6245
SpecConditionalINTEL
Reserved
Also see extension:
SPV_INTEL_function_variants
6246
FunctionVariantsINTEL
SpecConditionalINTEL
Reserved
Also see extension:
SPV_INTEL_function_variants
6400
GroupUniformArithmeticKHR
Reserved
Also see extension:
SPV_KHR_uniform_group_instructions
6425
TensorFloat32RoundingINTEL
Reserved
Also see extension:
SPV_INTEL_tensor_float32_conversion
6427
MaskedGatherScatterINTEL
Reserved
Also see extension:
SPV_INTEL_masked_gather_scatter
6441
CacheControlsINTEL
Reserved
Also see extension:
SPV_INTEL_cache_controls
6460
RegisterLimitsINTEL
Reserved
Also see extension:
SPV_INTEL_maximum_registers
6528
BindlessImagesINTEL
Reserved
Also see extension:
SPV_INTEL_bindless_images
6912
DotProductFloat16AccFloat32VALVE
Float16
Reserved
Also see extension:
SPV_VALVE_mixed_float_dot_product
6913
DotProductFloat16AccFloat16VALVE
Float16
Reserved
Also see extension:
SPV_VALVE_mixed_float_dot_product
6914
DotProductBFloat16AccVALVE
BFloat16TypeKHR
Reserved
Also see extension:
SPV_VALVE_mixed_float_dot_product
6915
DotProductFloat8AccFloat32VALVE
Float8EXT
Reserved
Also see extension:
SPV_VALVE_mixed_float_dot_product
3.2.31. Ray Flags
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Ray Flags
Enabling Capabilities
0x0
None
0x1
OpaqueKHR
RayQueryKHR
RayTracingKHR
Reserved
0x2
NoOpaqueKHR
RayQueryKHR
RayTracingKHR
Reserved
0x4
TerminateOnFirstHitKHR
RayQueryKHR
RayTracingKHR
Reserved
0x8
SkipClosestHitShaderKHR
RayQueryKHR
RayTracingKHR
Reserved
0x10
CullBackFacingTrianglesKHR
RayQueryKHR
RayTracingKHR
Reserved
0x20
CullFrontFacingTrianglesKHR
RayQueryKHR
RayTracingKHR
Reserved
0x40
CullOpaqueKHR
RayQueryKHR
RayTracingKHR
Reserved
0x80
CullNoOpaqueKHR
RayQueryKHR
RayTracingKHR
Reserved
0x100
SkipTrianglesKHR (SkipBuiltinPrimitivesNV)
RayTraversalPrimitiveCullingKHR
Reserved
0x200
SkipAABBsKHR
RayTraversalPrimitiveCullingKHR
Reserved
0x400
ForceOpacityMicromap2StateEXT
RayTracingOpacityMicromapEXT
Reserved
3.2.32. Ray Query Intersection
Ray Query Intersection
Enabling Capabilities
RayQueryCandidateIntersectionKHR
RayQueryKHR
Reserved
RayQueryCommittedIntersectionKHR
RayQueryKHR
Reserved
3.2.33. Ray Query Committed Type
Ray Query Committed Type
Enabling Capabilities
RayQueryCommittedIntersectionNoneKHR
RayQueryKHR
Reserved
RayQueryCommittedIntersectionTriangleKHR
RayQueryKHR
Reserved
RayQueryCommittedIntersectionGeneratedKHR
RayQueryKHR
Reserved
3.2.34. Ray Query Candidate Type
Ray Query Candidate Type
Enabling Capabilities
RayQueryCandidateIntersectionTriangleKHR
RayQueryKHR
Reserved
RayQueryCandidateIntersectionAABBKHR
RayQueryKHR
Reserved
3.2.35. Fragment Shading Rate
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Fragment Shading Rate
Enabling Capabilities
0x0
None
0x1
Vertical2Pixels
FragmentShadingRateKHR
Reserved
0x2
Vertical4Pixels
FragmentShadingRateKHR
Reserved
0x4
Horizontal2Pixels
FragmentShadingRateKHR
Reserved
0x8
Horizontal4Pixels
FragmentShadingRateKHR
Reserved
3.2.36. FP Denorm Mode
Floating point denormalized handling mode.
FP Denorm Mode
Enabling Capabilities
Preserve
FunctionFloatControlINTEL
Reserved
FlushToZero
FunctionFloatControlINTEL
Reserved
3.2.37. FP Operation Mode
Floating point operation mode.
FP Operation Mode
Enabling Capabilities
IEEE
FunctionFloatControlINTEL
Reserved
ALT
FunctionFloatControlINTEL
Reserved
3.2.38. Quantization Mode
Quantization Mode
Enabling Capabilities
TRN
ArbitraryPrecisionFixedPointALTERA
Reserved
TRN_ZERO
ArbitraryPrecisionFixedPointALTERA
Reserved
RND
ArbitraryPrecisionFixedPointALTERA
Reserved
RND_ZERO
ArbitraryPrecisionFixedPointALTERA
Reserved
RND_INF
ArbitraryPrecisionFixedPointALTERA
Reserved
RND_MIN_INF
ArbitraryPrecisionFixedPointALTERA
Reserved
RND_CONV
ArbitraryPrecisionFixedPointALTERA
Reserved
RND_CONV_ODD
ArbitraryPrecisionFixedPointALTERA
Reserved
3.2.39. Overflow Mode
Overflow Mode
Enabling Capabilities
WRAP
ArbitraryPrecisionFixedPointALTERA
Reserved
SAT
ArbitraryPrecisionFixedPointALTERA
Reserved
SAT_ZERO
ArbitraryPrecisionFixedPointALTERA
Reserved
SAT_SYM
ArbitraryPrecisionFixedPointALTERA
Reserved
3.2.40. Packed Vector Format
Used by:
OpSDot
OpUDot
OpSUDot
OpSDotAccSat
OpUDotAccSat
OpSUDotAccSat
Packed Vector Format
Enabling Capabilities
PackedVectorFormat4x8Bit (PackedVectorFormat4x8BitKHR)
Interpret 32-bit scalar integer operands as vectors of four 8-bit components. Vector components follow byte significance order with the lowest-numbered component stored in the least significant byte.
Missing before
version 1.6
Also see extension:
SPV_KHR_integer_dot_product
3.2.41. Cooperative Matrix Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpCooperativeMatrixMulAddKHR
OpCooperativeVectorMatrixMulNV
, and
OpCooperativeVectorMatrixMulAddNV
Cooperative Matrix Operands
Enabling Capabilities
0x0
None
0x1
MatrixASignedComponentsKHR
Reserved
0x2
MatrixBSignedComponentsKHR
Reserved
0x4
MatrixCSignedComponentsKHR
Reserved
0x8
MatrixResultSignedComponentsKHR
Reserved
0x10
SaturatingAccumulationKHR
Reserved
3.2.42. Cooperative Matrix Layout
Cooperative Matrix Layout
Enabling Capabilities
RowMajorKHR
Reserved
ColumnMajorKHR
Reserved
4202
RowBlockedInterleavedARM
CooperativeMatrixLayoutsARM
Reserved
4203
ColumnBlockedInterleavedARM
CooperativeMatrixLayoutsARM
Reserved
3.2.43. Cooperative Matrix Use
Cooperative Matrix Use
Enabling Capabilities
MatrixAKHR
Reserved
MatrixBKHR
Reserved
MatrixAccumulatorKHR
Reserved
3.2.44. Cooperative Matrix Reduce Mode
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpCooperativeMatrixReduceNV
Cooperative Matrix Reduce Mode
Enabling Capabilities
0x0
None
0x1
Row
Reserved
0x2
Column
Reserved
0x4
2x2
Reserved
3.2.45. Tensor Clamp Mode
Tensor Clamp Mode
Enabling Capabilities
Undefined
Reserved
Constant
Reserved
ClampToEdge
Reserved
Repeat
Reserved
RepeatMirrored
Reserved
3.2.46. Tensor Addressing Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpCooperativeMatrixLoadTensorNV
and
OpCooperativeMatrixStoreTensorNV
Tensor Addressing Operands
Enabling Capabilities
0x0
None
0x1
TensorView
CooperativeMatrixTensorAddressingNV
Reserved
0x2
DecodeFunc
CooperativeMatrixBlockLoadsNV
Reserved
3.2.47. Tensor Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpTensorReadARM
and
OpTensorWriteARM
Tensor Operands
Enabling Capabilities
0x0
None
0x1
NontemporalARM
TensorsARM
Reserved
0x2
OutOfBoundsValueARM
TensorsARM
Reserved
0x4
MakeElementAvailableARM
TensorsARM
Reserved
0x8
MakeElementVisibleARM
TensorsARM
Reserved
0x10
NonPrivateElementARM
TensorsARM
Reserved
3.2.48. Initialization Mode Qualifier
Initialization Mode Qualifier
Enabling Capabilities
InitOnDeviceReprogramALTERA (InitOnDeviceReprogramINTEL)
GlobalVariableFPGADecorationsALTERA
Reserved
InitOnDeviceResetALTERA (InitOnDeviceResetINTEL)
GlobalVariableFPGADecorationsALTERA
Reserved
3.2.49. Host Access Qualifier
Host Access Qualifier
Enabling Capabilities
NoneINTEL
GlobalVariableHostAccessINTEL
Reserved
ReadINTEL
GlobalVariableHostAccessINTEL
Reserved
WriteINTEL
GlobalVariableHostAccessINTEL
Reserved
ReadWriteINTEL
GlobalVariableHostAccessINTEL
Reserved
3.2.50. Load Cache Control
Load Cache Control
Enabling Capabilities
UncachedINTEL
CacheControlsINTEL
Reserved
CachedINTEL
CacheControlsINTEL
Reserved
StreamingINTEL
CacheControlsINTEL
Reserved
InvalidateAfterReadINTEL
CacheControlsINTEL
Reserved
ConstCachedINTEL
CacheControlsINTEL
Reserved
3.2.51. Store Cache Control
Store Cache Control
Enabling Capabilities
UncachedINTEL
CacheControlsINTEL
Reserved
WriteThroughINTEL
CacheControlsINTEL
Reserved
WriteBackINTEL
CacheControlsINTEL
Reserved
StreamingINTEL
CacheControlsINTEL
Reserved
3.2.52. Named Maximum Number of Registers
Named Maximum Number of Registers
Enabling Capabilities
AutoINTEL
RegisterLimitsINTEL
Reserved
3.2.53. Matrix Multiply Accumulate Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpSubgroupMatrixMultiplyAccumulateINTEL
Matrix Multiply Accumulate Operands
Enabling Capabilities
0x0
None
0x1
MatrixASignedComponentsINTEL
Reserved
0x2
MatrixBSignedComponentsINTEL
Reserved
0x4
MatrixCBFloat16INTEL
Reserved
0x8
MatrixResultBFloat16INTEL
Reserved
0x10
MatrixAPackedInt8INTEL
Reserved
0x20
MatrixBPackedInt8INTEL
Reserved
0x40
MatrixAPackedInt4INTEL
Reserved
0x80
MatrixBPackedInt4INTEL
Reserved
0x100
MatrixATF32INTEL
Reserved
0x200
MatrixBTF32INTEL
Reserved
0x400
MatrixAPackedFloat16INTEL
Reserved
0x800
MatrixBPackedFloat16INTEL
Reserved
0x1000
MatrixAPackedBFloat16INTEL
Reserved
0x2000
MatrixBPackedBFloat16INTEL
Reserved
3.2.54. Raw Access Chain Operands
This is a literal mask; it can be formed by combining the bits from multiple rows in the table below.
Used by
OpRawAccessChainNV
Raw Access Chain Operands
Enabling Capabilities
0x0
None
0x1
RobustnessPerComponentNV
RawAccessChainsNV
Reserved
0x2
RobustnessPerElementNV
RawAccessChainsNV
Reserved
3.2.55. FP Encoding
Specifies an alternative floating point encoding.
The
Width(s)
column specifies the set of valid width the encoding operand can be used with. If no value is provided, the valid widths for the operand are defined by the client API. Otherwise, the
Width
operand of
OpTypeFloat
must match one the specified values.
Used by
OpTypeFloat
FP Encoding
Width(s)
Enabling Capabilities
BFloat16KHR
16
BFloat16TypeKHR
Reserved
4214
Float8E4M3EXT
Float8EXT
Reserved
4215
Float8E5M2EXT
Float8EXT
Reserved
3.2.56. Cooperative Vector Matrix Layout
Cooperative Vector Matrix Layout
Enabling Capabilities
RowMajorNV
Reserved
ColumnMajorNV
Reserved
InferencingOptimalNV
Reserved
TrainingOptimalNV
Reserved
3.2.57. Cooperative Vector Matrix Component Type
Cooperative Vector Matrix Component Type
Enabling Capabilities
Float16NV
Reserved
Float32NV
Reserved
Float64NV
Reserved
SignedInt8NV
Reserved
SignedInt16NV
Reserved
SignedInt32NV
Reserved
SignedInt64NV
Reserved
UnsignedInt8NV
Reserved
UnsignedInt16NV
Reserved
UnsignedInt32NV
Reserved
10
UnsignedInt64NV
Reserved
1000491000
SignedInt8PackedNV
Reserved
1000491001
UnsignedInt8PackedNV
Reserved
1000491002
FloatE4M3NV
Reserved
1000491003
FloatE5M2NV
Reserved
3.3. Instructions
Form for each instruction:
Opcode Name
(name-alias, name-alias, …)
Instruction description.
Word Count
is the high-order 16 bits of word 0 of the instruction, holding its total
WordCount
. If the instruction takes a variable number of operands,
Word Count
also says "+ variable", after stating the minimum size of the instruction.
Opcode
is the low-order 16 bits of word 0 of the instruction, holding its opcode enumerant.
Results
, when present, are any
Result
or
Result Type
created by the instruction. Each
Result
is always 32 bits.
Operands
, when present, are any literals, other instruction’s
Result
, etc., consumed by the instruction. Each operand is always 32 bits.
Capability
Enabling Capabilities
(when needed)
Word Count
Opcode
Results
Operands
3.3.1. Miscellaneous Instructions
OpNop
This has no semantic impact and can safely be removed from a module.
OpUndef
Make an
intermediate
object with an
undefined value
Result Type
is the type of object to make.
Result Type
can be any type except
OpTypeVoid
Result Type
Result
OpSizeOf
Computes the run-time size of the type pointed to by
Pointer
Result Type
must be a 32-bit
integer type
scalar.
Pointer
must point to a concrete type.
Capability
Addresses
Missing before
version 1.1
321
Result Type
Result
Pointer
OpCooperativeMatrixLengthKHR
Reserved.
Capability
CooperativeMatrixKHR
Reserved
4460
Result Type
Result
Type
OpAssumeTrueKHR
Reserved.
Capability
ExpectAssumeKHR
Reserved
5630
Condition
OpExpectKHR
Reserved.
Capability
ExpectAssumeKHR
Reserved
5631
Result Type
Result
Value
ExpectedValue
OpArithmeticFenceEXT
Reserved.
Capability
ArithmeticFenceEXT
Reserved
6145
Result Type
Result
Target
3.3.2. Debug Instructions
OpSourceContinued
Continue specifying the
Source
text from the previous instruction. This has no semantic impact and can safely be removed from a module.
Continued Source
is a continuation of the source text in the previous
Source
The previous instruction must be an
OpSource
or an
OpSourceContinued
instruction. As is true for all literal strings, the previous instruction’s string was nul terminated. That terminating nul from the previous instruction is not part of the source text; the first character of
Continued Source
logically immediately follows the last character of
Source
before its nul.
2 + variable
Literal
Continued Source
OpSource
Document what
source language
and text this module was translated from. This has no semantic impact and can safely be removed from a module.
Version
is the version of the source language. It is an unsigned 32-bit integer.
File
is an
OpString
instruction and is the source-level file name.
Source
is the text of the source-level file.
Each client API specifies what form the
Version
operand takes, per source language.
3 + variable
Source Language
Literal
Version
Optional
File
Optional
Literal
Source
OpSourceExtension
Document an extension to the source language. This has no semantic impact and can safely be removed from a module.
Extension
is a string describing a source-language extension. Its form is dependent on the how the source language describes extensions.
2 + variable
Literal
Extension
OpName
Assign a name string to another instruction’s
Result
. This has no semantic impact and can safely be removed from a module.
Target
is the
Result
to assign a name to. It can be the
Result
of any other instruction; a variable, function, type, intermediate result, etc.
Name
is the string to assign.
3 + variable
Target
Literal
Name
OpMemberName
Assign a name string to a member of a structure type. This has no semantic impact and can safely be removed from a module.
Type
is the
from an
OpTypeStruct
instruction.
Member
is the number of the member to assign in the structure. The first member is member 0, the next is member 1, …
Member
is an unsigned 32-bit integer.
Name
is the string to assign to the member.
4 + variable
Type
Literal
Member
Literal
Name
OpString
Assign a
Result
to a string for use by other debug instructions (see
OpLine
and
OpSource
). This has no semantic impact and can safely be removed from a module. (Removal also requires removal of all instructions referencing
Result
.)
String
is the string being assigned a
Result
3 + variable
Result
Literal
String
OpLine
Add source-level location information. This has no semantic impact and can safely be removed from a module.
This location information applies to the instructions physically following this instruction, up to the first occurrence of any of the following: the next end of block, the next
OpLine
instruction, or the next
OpNoLine
instruction.
File
must be an
OpString
instruction and is the source-level file name.
Line
is the source-level line number.
Line
is an unsigned 32-bit integer.
Column
is the source-level column number.
Column
is an unsigned 32-bit integer.
OpLine
can generally immediately precede other instructions, with the following exceptions:
- it may not be used until after the
annotation
instructions,
(see the
Logical Layout
section)
- must not be the last instruction in a block, which is defined to end with a
termination instruction
- if a branch
merge instruction
is used, the last
OpLine
in the block must be before its merge instruction
File
Literal
Line
Literal
Column
OpNoLine
Discontinue any source-level location information that might be active from a previous
OpLine
instruction. This has no semantic impact and can safely be removed from a module.
This instruction must only appear after the
annotation
instructions (see the
Logical Layout
section). It must not be the last instruction in a block, or the second-to-last instruction if the block has a
merge instruction
. There is not a requirement that there is a preceding
OpLine
instruction.
317
OpModuleProcessed
Document a process that was applied to a module. This has no semantic impact and can safely be removed from a module.
Process
is a string describing a process and/or tool (processor) that did the processing. Its form is dependent on the processor.
Missing before
version 1.1
2 + variable
330
Literal
Process
3.3.3. Annotation Instructions
OpDecorate
Add a
Decoration
to another
Target
is the
to decorate. It can potentially be any
that is a forward reference. A set of decorations can be grouped together by having multiple decoration instructions targeting the same
OpDecorationGroup
instruction.
This instruction is only valid if the
Decoration
operand is a
decoration
that takes no
Extra Operands
, or takes
Extra Operands
that are not
operands.
3 + variable
71
Target
Decoration
Literal, Literal, …
See
Decoration
OpMemberDecorate
Add a
Decoration
to a member of a structure type.
Structure type
is the
of a type from
OpTypeStruct
Member
is the number of the member to decorate in the type. The first member is member 0, the next is member 1, …
Note: See
OpDecorate
for creating groups of decorations for consumption by
OpGroupMemberDecorate
4 + variable
72
Structure Type
Literal
Member
Decoration
Literal, Literal, …
See
Decoration
OpDecorationGroup
Deprecated
(directly use non-group decoration instructions instead).
A collector for
Decorations
from
OpDecorate
instructions. All such decoration instructions targeting this
OpDecorationGroup
instruction must precede it. Subsequent
OpGroupDecorate
and
OpGroupMemberDecorate
instructions that consume this instruction’s
Result
will apply these decorations to their targets.
73
Result
OpGroupDecorate
Deprecated
(directly use non-group decoration instructions instead).
Add a group of
Decorations
to another
Decoration Group
is the
of an
OpDecorationGroup
instruction.
Targets
is a list of
to decorate with the groups of decorations. The
Targets
list must not include the
of any
OpDecorationGroup
instruction.
2 + variable
74
Decoration Group
Targets
OpGroupMemberDecorate
Deprecated
(directly use non-group decoration instructions instead).
Add a group of
Decorations
to members of structure types.
Decoration Group
is the
of an
OpDecorationGroup
instruction.
Targets
is a list of (
Member
) pairs to decorate with the groups of decorations. Each
in the pair must be a target structure type, and the associated
Member
is the number of the member to decorate in the type. The first member is member 0, the next is member 1, …
2 + variable
75
Decoration Group
Targets
OpDecorateId
Add a
Decoration
to another
, using
as
Extra Operands
Target
is the
to decorate. It can potentially be any
that is a forward reference.
Target
must not be an
OpDecorationGroup
instruction.
This instruction is only valid if the
Decoration
operand is a
decoration
that takes
Extra Operands
that are
operands. All such
Extra Operands
must be
constant instructions
or
OpVariable
instructions. All
Extra Operands
must appear before
Target
Missing before
version 1.2
Also see extension:
SPV_GOOGLE_hlsl_functionality1
3 + variable
332
Target
Decoration
See
Decoration
OpMemberDecorateIdEXT
Reserved.
Capability
DescriptorHeapEXT
Reserved
4 + variable
5127
Structure Type
Literal
Member
Decoration
See
Decoration
OpDecorateString (OpDecorateStringGOOGLE)
Add a string
Decoration
to another
Target
is the
to decorate. It can potentially be any
that is a forward reference, except it must not be the
of an
OpDecorationGroup
Decoration
is a
decoration
that takes at least one
Literal
operand, and has only
Literal
string operands.
Missing before
version 1.4
Also see extensions:
SPV_GOOGLE_decorate_string
SPV_GOOGLE_hlsl_functionality1
4 + variable
5632
Target
Decoration
Literal
See
Decoration
Optional
Literals
See
Decoration
OpMemberDecorateString (OpMemberDecorateStringGOOGLE)
Add a string
Decoration
to a member of a structure type.
Structure Type
is the
of an
OpTypeStruct
Member
is the number of the member to decorate in the type.
Member
is an unsigned 32-bit integer. The first member is member 0, the next is member 1, …
Decoration
is a
decoration
that takes at least one
Literal
operand, and has only
Literal
string operands.
Missing before
version 1.4
Also see extensions:
SPV_GOOGLE_decorate_string
SPV_GOOGLE_hlsl_functionality1
5 + variable
5633
Struct Type
Literal
Member
Decoration
Literal
See
Decoration
Optional
Literals
See
Decoration
3.3.4. Extension Instructions
OpExtension
Declare use of an extension to SPIR-V. This allows validation of additional instructions, tokens, semantics, etc.
Name
is the extension’s name string.
2 + variable
10
Literal
Name
OpExtInstImport
Import an extended set of instructions. It can be later referenced by the
Result
Name
is the extended instruction-set’s name string.
Before
version 1.6, there must be an external specification defining the semantics for this extended instruction set.
Starting with
version 1.6, if
Name
starts with "NonSemantic.", including the period that separates the namespace "NonSemantic" from the rest of the name, it is encouraged for a specification to exist on the SPIR-V Registry, but it is not required.
Starting with
version 1.6, an extended instruction-set name which is prefixed with "NonSemantic." is guaranteed to contain only
non-semantic instructions
, and all
OpExtInst
instructions referencing this set can be ignored. All instructions within such a set must have only
operands; no literals. When literals are needed, then the
Result
from an
OpConstant
or
OpString
instruction is referenced as appropriate.
Result
from these non-semantic instruction-set instructions must be used only in other non-semantic instructions.
See
Extended Instruction Sets
for more information.
3 + variable
11
Result
Literal
Name
OpExtInst
Execute an instruction in an imported set of extended instructions.
Result Type
is defined, per
Instruction
, in the external specification for
Set
Set
is the result of an
OpExtInstImport
instruction.
Instruction
is the enumerant of the instruction to execute within
Set
. It is an unsigned 32-bit integer. The semantics of the instruction are defined in the external specification for
Set
Operand 1, …
are the operands to the extended instruction.
5 + variable
12
Result Type
Result
Set
Literal
Instruction
Operand 1, Operand 2, …
OpExtInstWithForwardRefsKHR
Reserved.
Reserved
Also see extension:
SPV_KHR_relaxed_extended_instruction
5 + variable
4433
Result Type
Result
Set
Literal
Instruction
Operand 1, Operand 2, …
OpConditionalExtensionINTEL
Reserved.
Capability
SpecConditionalINTEL
Reserved
3 + variable
6248
Condition
Literal
Name
3.3.5. Mode-Setting Instructions
OpMemoryModel
Set addressing model and memory model for the entire module.
Addressing Model
selects the module’s
Addressing Model
Memory Model
selects the module’s memory model, see
Memory Model
14
Addressing Model
Memory Model
OpEntryPoint
Declare an
entry point
, its execution model, and its interface.
Execution Model
is the execution model for the entry point and its static call tree. See
Execution Model
Entry Point
must be the
Result
of an
OpFunction
instruction.
Name
is a name string for the entry point. A module must not have two
OpEntryPoint
instructions with the same
Execution Model
and the same
Name
string.
Interface
is a list of
of global
OpVariable
instructions. These declare the set of global variables from a module that form the interface of this entry point. The set of
Interface
must be equal to or a superset of the global
OpVariable
Result
referenced by the entry point’s static call tree, within the interface’s storage classes. Before
version 1.4
, the interface’s storage classes are limited to the
Input
and
Output
storage classes
. Starting with
version 1.4
, the interface’s storage classes are all
storage classes
used in declaring all global variables referenced by the entry point’s call tree.
Interface
are forward references. Before
version 1.4
, duplication of these
is tolerated. Starting with
version 1.4
, an
must not appear more than once.
4 + variable
15
Execution Model
Entry Point
Literal
Name
Interface
OpExecutionMode
Declare an execution mode for an entry point.
Entry Point
must be the
Entry Point
operand of an
OpEntryPoint
instruction.
Mode
is the execution mode. See
Execution Mode
This instruction is only valid if the
Mode
operand is an
execution mode
that takes no
Extra Operands
, or takes
Extra Operands
that are not
operands.
3 + variable
16
Entry Point
Execution Mode
Mode
Literal, Literal, …
See
Execution Mode
OpCapability
Declare a capability used by this module.
Capability
is the
capability
declared by this instruction. There are no restrictions on the order in which capabilities are declared.
See the
capabilities section
for more detail.
17
Capability
Capability
OpExecutionModeId
Declare an execution mode for an entry point, using
as
Extra Operands
Entry Point
must be the
Entry Point
operand of an
OpEntryPoint
instruction.
Mode
is the execution mode. See
Execution Mode
This instruction is only valid if the
Mode
operand is an
execution mode
that takes
Extra Operands
that are
operands. Otherwise, use
OpExecutionMode
Missing before
version 1.2
3 + variable
331
Entry Point
Execution Mode
Mode
See
Execution Mode
OpConditionalEntryPointINTEL
Reserved.
Capability
SpecConditionalINTEL
Reserved
5 + variable
6249
Condition
Execution Model
Entry Point
Literal
Name
Interface
OpConditionalCapabilityINTEL
Reserved.
Capability
SpecConditionalINTEL
Reserved
6250
Condition
Capability
Capability
3.3.6. Type-Declaration Instructions
OpTypeVoid
Declare the void type.
19
Result
OpTypeBool
Declare the
Boolean type
. Values of this type can only be either
true
or
false
. There is no physical size or bit pattern defined for these values. If they are stored (in conjunction with
OpVariable
), they must only be used with logical addressing operations, not physical, and only with non-externally visible shader
storage classes
UniformConstant
Workgroup
CrossWorkgroup
Private
Function
Input
, and
Output
20
Result
OpTypeInt
Declare a new
integer type
Width
specifies how many bits wide the type is.
Width
is an unsigned 32-bit integer. The bit pattern of a signed integer value is two’s complement.
Signedness
specifies whether there are signed semantics to preserve or validate.
0 indicates unsigned, or no signedness semantics
1 indicates signed semantics.
In all cases, the type of operation of an instruction comes from the instruction’s opcode, not the signedness of the operands.
21
Result